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July 2001

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Subject:
From:
David Fish <[log in to unmask]>
Reply To:
TechNet E-Mail Forum.
Date:
Tue, 3 Jul 2001 21:24:28 -0700
Content-Type:
text/plain
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text/plain (194 lines)
Guy,

What makes 100% solderability testing of the components, wires, and boards
referenced in J-STD-001, 5.2 a valid version of process control?  If a
mandated process step is process control, we sure have different perceptions
of process control.  We think of process control as an organic element that
the process operator changes to maintain and improve quality.  Yano,
something out of Shewhart's work that started in the 1920s.  Tell me, does
IPC- 9191 "General Guidelines for Implementation of Statistical Process
Control (SPC)" also suggest 100% sampling?

You speak of managing risk and making business decisions.  We appreciate
that your comments speak to everyday processes within many companies.  What
in J-STD-001 says that you can still be compliant after making business
decisions that are not in compliance with the standard?  We read it as "all
or nothing."  We thought precluding making business decisions about the
standard was the intent all the SHALLs when we went from rev B to rev C.

Guy, you're correct, Mike's requirement for "objective evidence" is not from
J-001, 5.4 [or 5.2]. On the other hand, most quality systems require
objective evidence to demonstrate that you do what you say you do [and
obtain certification from outside auditors].  So if you say you comply with
J-STD-001, you need to be able to prove it!!!  [The realization of a need to
demonstrate compliance is probably the inspiration for this thread.  You
know . "Lordy, how are we going to do THAT?"]

On you opinion that 100% solderability testing is vital to obtaining 75%
barrel fill, we only float [sacrifice] a single board in each lot and we get
GREAT barrel fill, well except in the cases of a couple of nasty ground
planes, but we know we get cut some slack on those.

Where are STC BIG dogs?

Dave Fish
----- Original Message -----
From: Guy Ramsey <[log in to unmask]>
To: <[log in to unmask]>
Sent: Tuesday, July 03, 2001 5:08 AM
Subject: Re: [TN] J-STD-002 and -003 solderability testing...


> Perhaps this requirement is a "hold over." But it seems consistent with
> requirements of process control. Process control is one element of a
quality
> system.
>
> Quality systems are essentially risk control. The amount of risk you can
> tolerate is a business decision. Does it make sense to "float test" BGA
and
> CSP components? Can we order a test coupon to accompany PWBs and use them
> for solderability testing? What portion of the lot must be tested? The
> answers to these questions depend on how much risk you or your customers
can
> tolerate. Remember your process control plan must be available for review
by
> your customers.
>
> IMHO this clause in the J-STD-001 is vital. Without this clause the 75%
> vertical fill requirements  might very well allow defective materials and
> product out of your production line. Minimum SMT solder fillets that
appear
> acceptable might be very weak.
>
> Does 5.2 require "objective evidence?" I read that paragraph as a
> requirement for proactive consideration of solderability.
>
> Does 5.4 require more testing? I don't think so. I read that paragraph as
a
> requirement for consideration of consequences of storage.
>
> Guy Ramsey
> Senior Lab Technician / Instructor
>
> E-Mail: [log in to unmask]
> Ph: (610) 362-1200 x107
> Fax: (610) 362-1290
>
> -----Original Message-----
> From: TechNet [mailto:[log in to unmask]]On Behalf Of David Fish
> Sent: Monday, July 02, 2001 11:20 PM
> To: [log in to unmask]
> Subject: Re: [TN] J-STD-002 and -003 solderability testing...
>
>
> Mike,
> We are guilty as charged. We have no "'objective evidence' of J-002
> compliance". Among our problems with meeting this requirement is an
> inability to figure-out how to:
> * Keep the solder balls on BGA from dissolving in the solder pot during
our
> dip & look solderability test [actually this ends-up being more of a float
> test that dip & look].
> * Prevent flip chips from cracking during preheat prior to solderability
> test [which then dissolves the solder balls on the component].
> * Economically remove from QFP leads the excess solder after solderability
> tests. This is necessary to prevent bridging during assembly reflow
> soldering.
> * Remove the excess solder from pads and through holes on printed circuit
> boards after the float test.
> While these tasks are technically difficult, the costs of completion are
> compounded by the volume of cost associated with:
> * Performing the test.
> * Repackaging components.
> We just do not have a problem with the solderability of components and
> boards that warrants the cost of complying with J-STD-001, 5.4 "The
> manufacturer SHALL ensure that all components, parts, leads, wiring,
> terminals, and printed boards that have met the requirements of 5.2 are
> solderable at the start of hand and/or machine soldering operations."
[NOTE:
> Para 5.2 is the link to the J-002 and J-003 requirements that Mike
> mentioned.]
> We agree that many years ago component suppliers shipped many parts with
> poor quality terminations. And every-so-often, our buyers bring-in parts
> that don't solder as well as others, but the choice of parts that don't
> solder as well or no parts seems very straight forward to us. So, we use
OA
> flux. We believe that the majority 0402 & 0201 tombstoning due to uneven
> end-cap plating can be compensated with shrewd pad design.
> We demur. We believe a well formed solder fillet, which is impossible to
> obtain [without substantial rework] after solderability testing some
> components, is a better indicator of a good solder connection than file
> cabinets full of "objective evidence" on the completion of solderability
> tests. We believe that benefit of adhering to the requirements of
standards
> need to balance against the cost of adherence.
> If you agree that this requirement seems to be "an anachronistic
holdover",
> how do you explain its benefit and justification for inclusion in the
> standard?
> Next, isn't solderability testing more art than science, evidenced by the
> lousy GR&R of the various dip & look, SERA, and wetting balance equipment
on
> the market? And doesn't collecting C of Cs [if you can get them] from
> suppliers of uncontrolled products end-up being an ostrich head and sand
> type activity?
> Having said all of that, we actually wonder what we're missing. We feel as
> though we're living under a large stone. Please explain the process steps
> from purchase order issuance through receipt to soldering, including
testing
> the solderability of all array devices, QFP, and boards. How do you
suggest
> that we develop "'objective evidence' of J-002 compliance"?
> Dave Fish
> ----- Original Message -----
> From: Mike Sewell
> To: [log in to unmask]
> Sent: Monday, July 02, 2001 7:35 AM
> Subject: Re: [TN] J-STD-002 and -003 solderability testing...
>
>
> David,
>
> While I agree that it seems like an anachronistic holdover, J-STD-001
still
> states that components and wires to be soldered SHALL meet the
requirements
> of J-STD-002....and printed boards SHALL meets the requirements of
> J-STD-003.
> When pretinning is done, that operation may be used in lieu of
solderability
> testing.  So your "objective evidence" of '002 compliance is ....?
>
> '002 does state that solderability can be verified during manufacture, at
> time of receipt of material or tinning before assembly.
>
> Mike
>
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