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July 2001

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Subject:
From:
Genny Gibbard <[log in to unmask]>
Reply To:
TechNet E-Mail Forum.
Date:
Tue, 3 Jul 2001 11:53:32 -0600
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I would think you could just calculate the circumference of the via and,
knowing the thickness of the plating in the hole, use the same trace widths
vs. current tables.  The trace width is just curled up into a tube.  It
should give a close enough approximation for your purposes.  If you can fill
the hole with solder, it should be able to handle even more current,
although using reflow usually makes it difficult to keep the solder in the
hole.

-----Original Message-----
From: Malander, Michael [mailto:[log in to unmask]]
Sent: July 3, 2001 11:05 AM
To: [log in to unmask]
Subject: [TN] Via design verses current


I am designing a circuit and I was wondering if there was any standard for
via design verses current like there is for trace widths verses current.
does anyone know a standard like this exists and where I might find
information on it.  I have most of the IPC standard documentation on PCB
design but I was only able to find information on blind or hidden vias.  Can
I treat a standard via the with the same standard or is there a different
specification for them?

I would appreciate any information on this subject.  Thank you for your
help.

Michael Malander

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