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June 2001

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DesignerCouncil <[log in to unmask]>
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From:
David Cary <[log in to unmask]>
Date:
Wed, 20 Jun 2001 11:48:40 -0500
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"Beckman, Roy" <[log in to unmask]>, Paul Noonan <[log in to unmask]>
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"DesignerCouncil E-Mail Forum." <[log in to unmask]>, David Cary <[log in to unmask]>
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Dear Paul Noonan,

Paul Noonan <[log in to unmask]> on 2001-06-20 10:45:04 AM
>include their own hole copper plating
>thickness
...
>on the manufacturing notes, or do most people prefer to just leave it at the
>IPC specifications usually 20 Microns.

>From: Luther, Brandon [mailto:[log in to unmask]]
>Sent: Tuesday, June 19, 2001 7:20 AM
...
>  What tolerances is everybody using for vias holes?
...
I have a standard README.TXT file. It has some project-specific stuff, but this
section stays pretty much the same:

          3.Finished hole tolerances: (IPC-6011 & IPC-6012)
           a. Plated through-holes +/-0.003"
           b. Plated through-via holes +/-0.003" (solder plugged are acceptable)
           c. Plate through hole minimum copper wall thickness .001"
           NOTE: Hole diameters apply after plating.

All holes on my boards are through-hole-plated. I assume (?) that it's cheaper
for my assembly house to plug the alignment holes in the 4 corners of my board
just before wave soldering, than it is for my board house to plug those holes
just before plating the holes.

I'm thinking about relaxing my via specification, based on the conversation here
on the [DC] mailing list.

--
David Cary

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