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June 2001

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DesignerCouncil <[log in to unmask]>
Subject:
From:
"Roger M. Stoops" <[log in to unmask]>
Date:
Wed, 20 Jun 2001 13:16:55 -0400
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1.0
X-To:
Paul Noonan <[log in to unmask]>
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"DesignerCouncil E-Mail Forum." <[log in to unmask]>, [log in to unmask]
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We specify 25 microns (0.001") minimum.  The IPC spec (2221, Table 4-3) is
a minimum thickness for class 1 and 2 boards.  Maybe we are paranoid that
something less than 25um is bad; maybe it comes from the old days of boards
w/all leaded comps, and the idea that thicker copper in the holes would
survive rework better than thinner copper.
The current capacity of 20um vs. 25um vias is not much improvement, we just
put in add'n'l vias for current (or make larger diameter)
Roger M. Stoops, C.I.D., PCB Designer


Trimble
Engineering and Construction Division
5475 Kellenburger Rd.
Dayton, OH 45424-1099 USA
Ph: +01 937.233.8921 or +01 937.233.4574 ext 288
Fax: +01 937.233.7511






Hi All
Just curious to know if most Designers include their own hole copper
plating
thickness at say 25 or 30 Microns or what ever they feel that they require
on the manufacturing notes, or do most people prefer to just leave it at
the
IPC specifications usually 20 Microns. I am just interested perhaps people
are designing boards that will have a lot or current flowing through them
and feel that 20 Microns is not quite enough.
Any comments on this?

Regards
Paul Noonan

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