Matthew Lamkin <[log in to unmask]> on 2001-06-14
07:20:33 AM asked:
>the 0v plane..
>Should it be solid copper groundplane or should it be hatched?

Every inner plane I've ever seen has been solid (non-hatched).

Many early PWB designs
used the "cherry pie lattice" (hatched) for large copper polygons on the *outer*
 layers,
using something like a 12 mil track, 24 mil grid.
This is because early solder mask didn't stick well to metal,
so the array of little square holes in the metal
let the solder mask stick to the board better.

Current design practice uses completely solid areas of metal.

You might be interested in other design tips listed in the
  independent Protel FAQ
  http://groups.yahoo.com/group/protel-users/files/protelfaq.html
.

Is there a FAQ for general PWB layout design ? It seems silly to re-duplicate
the same information over and over in product-specific FAQs. Stuff like
Current design practice makes all vias "direct-connect". The spokes of "thermal
relief" are only used for holes where through-hole components mount.

>Recently I have started to use hatched groundplane to reduce the likelihood
>of the board
>warping due to uneven copper distribution

I think you've misinterpreted something somewhere.

>The board is 4 up as:
>Top = SMT components & some tracking.
>Top inner = 0v groundplane
>Bottom inner = Positive supply signals (not a single plane, but split into
>isolated supply signals)

That's what I and most other people do for 4 layer boards.

http://fstewart.ne.mediaone.net/DaEtiCsuiPitdcrutDesignNews.shtml#ssA974D19222FDC4AD
.

--
David Cary

"Dennis Saputelli" <[log in to unmask]> on 2001-06-09 01:19:07 PM
wrote:



"Dennis Saputelli" <[log in to unmask]> on 2001-06-09 01:19:07 PM

Please respond to "Protel EDA Forum" <[log in to unmask]>

To:   "Protel EDA Forum" <[log in to unmask]>
cc:    (bcc: David Cary/TULSA/BRUNSWICKOUTDOOR)

Subject:  Re: [PEDA] split planes no more?




interesting article in the new 'printed circuit design' mag (june 2001)
by Henry W. Ott (EMI consultant)
title: 'partitioning and layout of a mixed signal pcb'

in it he basically makes the case that split planes are generally a bad
thing

their best use he says is to correct a badly laid out board after the
fact and also in some cases they are needed for safety isolation

but as to localizing noise (preventing polution of low level signals)
and minimizing EMI nothing beats a *properly laid out* (i.e.
'routed/placed') board with a single ground plane possessing a single
net

...

i won't go into all that he has covered but as the split planes are so
pervasive and enough of a nuisance to implement i thought i would throw
this out there

Dennis Saputelli

--
___________________________________________________________________________
www.integratedcontrolsinc.com            Integrated Controls, Inc.
   tel: 415-647-0480                        2851 21st Street
      fax: 415-647-3003                        San Francisco, CA 94110

---------------------------------------------------------------------------------
DesignerCouncil Mail List provided as a free service by IPC using LISTSERV 1.8d
To unsubscribe, send a message to [log in to unmask] with following text in
the BODY (NOT the subject field): SIGNOFF DesignerCouncil.
To set a vacation stop for delivery of DesignerCouncil send: SET DesignerCouncil NOMAIL
Search previous postings at: www.ipc.org > On-Line Resources & Databases > E-mail Archives
Please visit IPC web site (http://www.ipc.org/html/forum.htm) for additional
information, or contact Keach Sasamori at [log in to unmask] or 847-509-9700 ext.5315
---------------------------------------------------------------------------------