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March 2001

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Subject:
From:
Jim Kittel <[log in to unmask]>
Reply To:
TechNet E-Mail Forum.
Date:
Thu, 29 Mar 2001 06:10:38 -0700
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Rudolph,
Are you running the bottom of the CCA over a wave solder machine.
Jim Kittel

 -----Original Message-----
From:   Rudolph Yu [mailto:[log in to unmask]]
Sent:   Wednesday, March 28, 2001 9:48 AM
To:     [log in to unmask]
Subject:        [TN] BGA crack- major headache

Here are the facts:

PBGA-272 balls
FR4 with HASL finishes 8 layers

The failure point always happens at the same I/O which is the 2nd last ball
of the top outmost row of the package. It is not located near the edge of
the board or any breakaway point.

Failure mode
Micro fracture found near the intermetallic layer between the BGA package
and the solder ball attached to it.

Around 0.001% of the products we built failed in the field because of this.
None of these were caught during the ICT or Functional test.

The same ASIC is also used on several other Products and have never seen an
issue like this.  Somehow this failure mode with this ASIC only occurs in
one particular product /design.


The ASIC / fab lot-related , ICT pin interference, stress by the breakaway
tab, and stencil cleanliness assumptions had already ruled out after a
controlled lot was built few weeks back.  All boards passed the tests.  But
now some boards started failing in the field.

Why the crack always happen to one single location(ball) with the same
product we built??


We have run out all the possibilities that we can think of. I hope all the
experts in TechNet can share their opinions on this.  Customer kept asking
for the root cause analysis. Right now we just cannot came up with a
reasonable one.

Thanks
Rudolph Yu

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