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March 2001

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From:
"<Peter George Duncan>" <[log in to unmask]>
Reply To:
TechNet E-Mail Forum.
Date:
Tue, 27 Mar 2001 11:15:39 +0800
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Hi, Jim,



Sorry to be so long with a reply, but this is something you could work on

for the benefit of many, I would think. My lead-in is a bit wordy, but you

can skip to the end of the bullet points if you want to get at the meat of

the problem.



We're in the throes of designing some conduction-cooled VME SMT boards. Old

hat, you say and I agree, but a big problem with conduction cooled boards

is cooling them, especially when, like ours, there has to be something like

a 5 degree temperature difference between the heat generating chips and the

edge of the card. The efficiency of the thermal path needed to achieve this

is phenominal and it seems largely impractical with materials and

techniques available just now, not to mention costs.



Apart from conducting heat through the board itself, we can take heat out

over the top of the boards, and this is a commonly adopted route but adds

bulk and weight. What's needed is a first rate means of conducting heat

from the hot chips to the thermal planes buried in the board and from the

thermal planes to the chassis and hence to the outside world, but there is

a technology gap here.



Question: How many interfaces and materials are there between the heat

generator in a chip and the chassis that finally disperses the heat?

Answer: there are normally 3 paths heat can take from a chip to the chassis

- (1) through the board, (2) through so-called "spreader plates" and

heatsinks mounted on top of the board, and (3) through the air within the

box, and each has the following interfaces and characteristics to consider.

Each interface is a barrier to good heat transference, and the thermal

characteristics of the materials to either side of each interface are

rarely as good as they could be.



1.   Path through the board:



¡¤    the component materials,

¡¤    the size of the air gap under each component, (component specified air

gap plus solder joint height allowance),

¡¤    the components that require thermal pads to be fitted and which are to

be left with air gaps,

¡¤    the thickness and area of thermal pad to be used under each thermally

sensitive component, chosen from the thicknesses commercially available

¡¤    the specified parameters of the thermal pad material ¨C thermal

conductivity, thermal resistance, etc ¨C which are required for input to the

model.

¡¤    the parameters for the adhesive used to bond the thermal pads to the

board (and component body?), if deemed to be significant to the

effectiveness of the thermal path.

¡¤    The characteristics of any thermal compound used to seal gaps, the

area it covers and its thickness.

¡¤    the thickness and area of the tin/lead plating that covers the PCB

copper thermal land area beneath thermally sensitive components, if deemed

to be significant.

¡¤    The thickness and area of the copper thermal land area

¡¤    The number of thermal via holes connecting the thermal land area to

the thermal plane(s)

¡¤    The cross-sectional area of copper plating in the thermal via holes

¡¤    The cross sectional area and length of thermal via hole filler

material, and its thermal characteristics (conductivity, resistance, etc)

¡¤    Thermal plane thickness and area and material thermal characteristics

¡¤    The number of thermal via holes connecting the thermal plane(s) to the

thermally conductive strips on either side of the top and bottom card

edges.

¡¤    the cross-sectional area of copper plating in the thermal via holes

¡¤    The cross sectional area and length of thermal via hole filler

material, and its thermal characteristics (conductivity, resistance, etc)

¡¤    The geometry, material, thermal characteristics, etc of the board edge

plating that connects the thermal plane(s) to the conducting strips

¡¤    The thickness, area and thermal characteristics of the copper

conducting strips

¡¤    The thickness, area and thermal characteristics of the tin/lead

plating that covers the conductive strips

¡¤    The thickness, area and thermal characteristics of any thermal

compound used to fill gaps between conductive strips and ¡®B¡¯ Frame, and

conductive strips and         underside aluminium strips and between ¡®B¡¯

Frame and wedgelocks.

¡¤    The material, thickness, contact area and thermal characteristics of

the aluminium strips and wedgelocks.

¡¤    The contact area between Aluminium strips/Wedgelocks and the Card

Cage.

¡¤    The thermal characteristics of the card cage.



2.   Thermal Path through the Spreader Plates:



¡¤    the component materials,

¡¤    the size of the air gap above each component,

¡¤    the thickness and area of thermal pad to be used above the components,

chosen from the thicknesses commercially available

¡¤    the specified parameters of the thermal pad material ¨C thermal

conductivity, thermal resistance, etc ¨C which are required for input to the

model.

¡¤    The characteristics of any thermal compound or other solution, used to

seal gaps, the area it covers and its thickness.

¡¤    The geometry, material, thermal characteristics, etc of the spreader

plate(s) that connect the thermal pad to the ¡®B¡¯ Frame. Does the anodising

have any significant effect   on their thermal conductivity?

¡¤    The thickness, area and thermal characteristics of the ¡®B¡¯ Frame

¡¤    The thickness, area and thermal characteristics of any thermal

compound used to fill gaps between conductive strips and ¡®B¡¯ Frame, and

conductive strips and         underside aluminium strips and between ¡®B¡¯

Frame and wedgelocks.

¡¤    The material, thickness, contact area and thermal characteristics of

the aluminium strips and wedgelocks.

¡¤    The contact area between Aluminium strips/Wedgelocks and the Card

Cage.

¡¤    The thermal characteristics of the card cage.



3.   Thermal Path through the air:



¡¤    There will be heat dissipation from the spreader plates and

non-covered components into the air within the card cage volume, and from

the air to the card cage. This will be a significant feature of the thermal

dissipation from the boards to the card cage cold walls and should not be

neglected.





In practice, we need  to completely fill air gaps with thermally conductive

material, the best being pure copper, but that adds too much weight and

cost and is too soft in many applications. Thermal pad materials were

developed for heat dissipation in plated-through-hole technology power

modules, and these also found their way onto other pth applications where

heat dissipation was critical. BUT these materials start at 0.25mm thick

and go up in steps of 0.25 or 0.5mm.



The airgap underneath a typical SMT component is, as it happens, 0.25mm,

but there are plenty that are 0.1mm and others that are 0.4 to 0.5mm. "So

what's the problem?" you say. "You have 0.25mm material for the 0.25mm gaps

and 0.5mm material for the 0.4 to 0.5mm gaps. Shame about the 0.1mm gaps -

but you could use thermal compound." This is true, BUT ....



1) The airgap under a component is a dimension given in the component data

sheet and is measured from the bottom of the component body to the under

surface of the component leads. When the component is soldered to a board,

there is a height of solder interposed between the lead and the board that

increases the height of the air gap. So you can fit 0.25mm pad material

under a component that has 0.25mm clearance, but when soldered, there will

still be an air gap equivalent to the height of the solder joint (in the

order of 0.002" to 0.003" when using a typical 0.005" solder paste

stencil), and nothing to fill it with apart from thermal compound that has

a lousy thermal conductivity rating. It is also very messy, quite apart

from the difficulty of putting it under a SMD.



2) Putting in a thicker thermal pad that will definitely fill the space

means that the component won't be able to be placed into the solder paste,

unless the thickness of the paste is increased. This is not always

desirable as too much solder tends to cause solder bridges, but it can be

beneficial to some components like CLCC's and others that inherently have

very rigid solder joints.



Generally, though, moving up to the next available thickness of thermal pad

means increasing the solder joint thickness from 0.08 mm to 0.33mm - an

increase of more than FOUR TIMES! even assuming a paste printer could cope

with a stencil with steps that high.



Any air gap in the thermal path, even a very small one, seems to result in

a very significant drop in the path's efficiency.



THE PROBLEM - your mission should you choose, etc.



I need highly thermally conductive, light-weight thermal pad materials that

are close tolerence, start at 0.1 mm thick and increase in thickness in

steps of 0.1mm or less, and are suitable for use under SMD's.



If you then want to work on materials that can fill the distance (currently

by way of via holes) between the board surface and the thermal planes

inside the board. They must also be very highly thermally conductive and

have approximately the same Co-efficient of Thermal Expansion as the

various substrate materials they will become integrated with, then you will

be kept busy for quite a while ....



.... and if you can find a cheap technique of manufacturing PCB's that

reduces the number of interfaces between chip and chassis to no more than

two, you will have cracked it for all of us.



Please let me know how you get on, unless there is someone already out

there who can tell me it's already been done (in which case he's keeping

very quiet).



Best regards



Pete Duncan

Asst Principal Engineer

ST Aerospace











"Kelly M. Schriver" <[log in to unmask]>@IPC.ORG> on 03/15/2001

06:10:59 AM



Please respond to "TechNet E-Mail Forum." <[log in to unmask]>; Please respond

      to "Kelly M. Schriver" <[log in to unmask]>



Sent by:  TechNet <[log in to unmask]>





To:   [log in to unmask]

cc:

Subject:  Re: [TN] ADVANCED PACKAGING MATERIALS AND TECHNOLOGIES









Hi Jim -



You're entering an area that I spent a good portion of my professional life

in, including these early stages of retirement.  First, I would give a bit

of advice: go with a bit of caution.  Sometimes the wonderful things

published in the technical reports are not yet quite ready for PRODUCTION.

I've been involved in quite a number of items in which the material or

parts

source simply couldn't reproduce what had been so wonderfully described,

once it came out of the laboratory environment.



Second, once you start to select an item/material/approach/design, etc.,

test it on some others of your peer group (including TechNet) to get a

clear

direct understanding of its frailties and pitfalls.



Always remember: To engineer is human!!  We learn far more from what goes

less than perfect than from our successes, simply because we go back to

analyze what the source of the problems were.



And, lastly, always ask the question of the material or process: "IS THIS

REASONABLE", then take the time to try to understand why or why not.



Best of luck and good regards on your endeavors, and I hope you enjoy it as

much I have mine.  If I can be of assistance, please shoot me a direct

Email.



Kelly

-----Original Message-----

From: Marsico, James <[log in to unmask]>

To: [log in to unmask] <[log in to unmask]>

Date: Tuesday, March 13, 2001 1:10 PM

Subject: [TN] ADVANCED PACKAGING MATERIALS AND TECHNOLOGIES





>Dear Technetters:

>

>This may be an unusual request, but here goes.  I have an opportunity to

>work on an electronics packaging design from conception to production.

The

>ground rule of this design is to use packaging, materials, processes and

>technologies which will be state-of-the-art 5 to 10 years from now.

>Everything from chassis materials, PWBs, assembly processes, component

>types, etc., to produce a product which is cost effective while

maintaining

>high reliability.  For me, immerging technologies include composite

>materials, high density interconnects, flip chip, flex circuits, micro

vias,

>but I know these technologies are already established.  What's new?  I'm

>looking for a place to start.  Any suggestions?

>

>Jim Marsico

>Senior Engineer

>Production Engineering

>AIL/Electronics Systems Group

>An EDO Company

>[log in to unmask] <mailto:[log in to unmask]>

>

>

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