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March 2001

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Subject:
From:
"Stephen R. Gregory" <[log in to unmask]>
Reply To:
TechNet E-Mail Forum.
Date:
Thu, 15 Mar 2001 09:44:27 EST
Content-Type:
text/plain
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text/plain (66 lines)
Hi Matt!

I noticed by your area code you're in the Bay Area, a really good person to
talk to
is a person named Dennis Johnson, he runs a company called "Onanon" over in
Milpitas...they got started by doing nothing but routing, scoring, and
drilling.

The contact info is:

Onanon Inc.
373 Sinclair Rd.
Milpitas, CA. 95035
Phone (408) 262-8990
Fax     (408) 262-2901
www.onanon.com

They're just off of 880 over by Solectron. Dennis is very knowledgable in
this area, and if I remember right, 3COM asked him to do a study for them on
how close they could place a capacitor to a score line on a PCMCIA board and
not worry about fracturing a solder joint...

-Steve Gregory-


> Hello,
>
>  I searched through the archives, but couldn't find much in the way of
>  specifics (although a few good summaries of positives and negatives of the
>  processes). We're looking to use score and break depanelization on a new
>  product, and I was interested in finding out what design rules people are
>  using.
>
>  Our CEM tells us .040" from board edge to component body and .020" to
traces
>  or pads when we use a "pizza cutter" type depanelization machine as this
>  process doesn't cause too much stress on the board. Is this consistent with
>  what others have used, and have the results been successful? Is this "pizza
>  cutter" a standard tool that assembly shops have?
>
>  What rules are used when just hand breaking the boards with a v-groove. How
>  about with a breakaway tab ("mouse bite")?
>
>  My main concern is not inducing any excess stress on the board or cracking
>  any components/joints.
>
>  Thanks for the assistance!
>  Matt
>
>  ~~~~~
>  Matt Sanders - Trimble Navigation, Component Technologies
>  [log in to unmask] <mailto:[log in to unmask]>
>  Phone: 408.481.7965
>  Fax: 408.481.2202
>  Pager: 408.619.3899

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