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March 2001

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From:
"Roger M. Stoops" <[log in to unmask]>
Date:
Mon, 12 Mar 2001 13:53:30 -0500
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1.0
X-To:
"Lam, Patrick" <[log in to unmask]>
Reply-To:
"TechNet E-Mail Forum." <[log in to unmask]>, [log in to unmask]
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Patrick,
Suggest you use IPC-2222, Section 9.1.5 and Table 9-1.  The fabrication
tolerance is dependent on the producibility level and maximum board
dimension.
If your fabricator is telling you  a total of 0.003" (plus/minus 0.0015"),
not bad!  If plus/minus 0.003", may still be within IPC standards; you be
the judge of what you truly need.
IMHO,
Roger M. Stoops, C.I.D., PCB Designer






                    "Lam, Patrick"
                    <Patrick.Lam@GLE        To:     [log in to unmask]
                    NAYRE.COM>              cc:
                    Sent by: TechNet        Subject:     [TN] Layer to Layer registration
                    <[log in to unmask]
                    >


                    03/12/01 01:01
                    PM
                    Please respond
                    to "TechNet
                    E-Mail Forum.";
                    Please respond
                    to "Lam,
                    Patrick"





Can someone tell me:
What is the maximum layer to layer mis-registration allowance for a 6-layer
PCB?

I have been specifying 0.0015", is asked to change to 0.003" by a new
supplier. I forgot where I got that 0.0015.

Please help!

Patrick Lam
Phone:(604)293.4392

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