Creswick,
Very interesting observation from your side on the use of
NFUF. Dexter does have few NFUF and i have used them.
Any Dexter guys out there to help them out?
regards.
MURTHY. S.S.
> -----Original Message-----
> From: Creswick [SMTP:[log in to unmask]]
> Sent: Sunday, February 18, 2001 11:37 AM
> To: [log in to unmask]
> Subject: Re: [TN] Flip-chip underfill?
>
> Rick,
>
> I did not mention the no-flow (or flux underfills) or a reason. We use
> them
> extensively on our LTCC (low temp co-fired ceramic) products with great
> efficiency - stencil solder paste, place SMD's, dispense flux underfill,
> place flip chip, place an RF shield over the entire structure, and reflow
> -
> post cure if necessary. Large die, up to 5.8mm sq, have passed extensive
> TC's (-40+125°C). Acoustic imaging has proven it a good process.
>
> Cannot say the same for laminates (PWB's) as a substrate. Usually, the
> corresponding solder pads on the PWB are solder mask defined. If the
> solderable area is not limited in some way, the solder bump will flow out
> acro ss the conductor, causing the FC to drop closer to the PWB - net
> result,
> reducing the reliability (reliability directly related to height of
> standoff).
>
> It seems that the openings in the solder mask are an excellent site for
> inducing voids in the underfill. Results in gross electrical
> non-contacts.
> Sometimes the device has rotated up to 90° from its original position due
> to
> gross void formation (and likely help from convection oven), yet
> essentially
> the same part made from LTCC can run 'forever' without failure. I've not
> found the root cause yet. Tested many things. Maybe another reader has
> had
> similar experience and can relate a solution on their end.
>
> Since you likely did not have acoustic imaging capability in-house, I
> figured it best not to steer you down what seemed to be an easy path, that
> might be prone to latent defects.
>
> I know that Kester and Emerson & Cumings make flux underfills, but I do
> not
> remember that (Dexter) Hysol has them - I know they have traditional
> post-reflow underfills, as do a whole slug of other sources.
>
> I, personally, have underfilled a few of the 5.8mm devices by hand using
> the
> normal post-reflow type underfills, with very good success, but I have
> made
> a few boo boo's too. I have the ability to cut glass slides to the same
> dimensions as the device. Combining this with placing a few wire bonds on
> the PWB, creates a realisitic dummy flip chip that you can gauge your
> manual
> (or automatic) underfill process with.
>
> Do you know what environmental requirements you need to meet??
>
> Hope this helps too.
>
>
> Steve Creswick
> CTS RF Integrated Modules
>
>
> At 09:21 AM 2/16/01 -0800, you wrote:
> >Steven,
> >
> >Lots of good info and questions, some of which I hadn't considered or
> don't
> >have answers for yet. The device we're placing is around 3.5mm square
> with
> >16 eutectic bumps that are approximated .15mm. Pads on the PCB are
> >approximately the same size and we do have to place 2 smd chip resistors
> on
> >the same substrate. We're only doing a 10 piece test run with only 30-40
> >pieces to follow that so volume initially is low. We have an EFD
> dispenser
> >that I'm hoping to use for underfill and intend to attempt placement
> with
> >an SRT Summit BGA rework system. From the limited amount of research
> I've
> >done to this point it seemed to me that some of the no flow-fluxing
> >underfill systems might be a viable approach although I haven't done alot
> of
> >review of that process yet so may be overlooking something.
> >
> >Thanks for the feedback.
> >
> >Rick Thompson
> >
> >-----Original Message-----
> >From: TechNet [mailto:[log in to unmask]]On Behalf Of Creswick
> >Sent: Thursday, February 15, 2001 5:29 PM
> >To: [log in to unmask]
> >Subject: Re: [TN] Flip-chip underfill?
> >
> >
> >Rick,
> >
> >Could you provide a little more info, such as how large is device and the
> >bump dia & pitch? Number I/O's?
> >
> >Is the flip chip bump composed of Sn63, or a IBM C4 structure?
> >
> >How large are the corresponding solderable pads on the PWB?
> >
> >How close are the nearest adjacent components?
> >
> >How many do you have to put together?
> >
> >Are you planning to co-reflow the FC with SMD's, or secondary reflow?
> >
> >What dispensing equipment do you have available to use?
> >
> >How do you plan to align and place the flip chips?
> >
> >
> >Indium (and others) make no clean flip chip fluxes. One can either dip
> the
> >solder bumps approx 1/3 to 1/2 way of their height into a paste-like
> flux,
> >or jet or dispense a wee bit of the same flux in a very low viscosity
> >version. I believe that Indium's part number designation is FC-NC-LT-A,
> B,
> >C, D (where FC means Flip Chip, NC = no clean, LT=low temp (Sn63 like)
> and A
> >thru D denote viscosity (A=like alcohol, D= like a paste flux).
> >
> >Big, oversize (or otherwise 'fat') fillets are visually unappealing, and
> (in
> >my testing) less reliable than small, but uniform fillets.
> >
> >Most underfills that are applied after FC attachment will require the
> >component to be heated to 70-90°C to enhance the capillary flow of the
> >material. Post-dispense cures range from 125°C to 150°C, depending on
> >supplier, etc. etc. Times range from minutes to about an hour.
> >
> >Rework after underfill cure is a pain, so essentially be assured that all
> is
> >well before sealing it up tight with underfill.
> >
> >Scads of people to supply underfills - Dexter Hysol (now part of
> Loctite),
> >Ablestik Labs, Kester, Alpha, Emerson & Cuming (Ablestik), Loctite, .....
> >
> >Placing the chip by hand may not be the smartest thing to do, but with a
> >reasonable setup, and small die (say less than 0.100" square) you should
> be
> >able to dispense by hand with something similar to an EFD dispenser.
> >Underfill from two adjacent sides only - let the capillary flow bring it
> >under the chip and to the other sides. For larger chips, one might be
> >better to use a dispenser that you can program a path. Whatever you do,
> do
> >not allow the underfill wavefront to deplete the available reservior
> (excess
> >material not under the chip). If the reservior is depleted, you can pull
> >air under the chip - oops!
> >
> >Do you plan to check for underfill voids? X-ray generally will NOT work!
> >Got an acoustic microscope??
> >
> >What environmental requirements do you have to meet?
> >
> >Parting shots - If is a low rel, cheap & dirty PWB, you may get away with
> >it. If it is a higher quality project, where the customer can come back
> and
> >bite you - tread carefully. It may appear easier than it actually is
> >
> >Have fun!
> >
> >Steven Creswick
> >CTS RF Integrated Modules
> >
> >
> >At 10:57 AM 2/15/01 -0800, you wrote:
> >>We've been asked to do a small proto run of flip-chip assemblies. I'm
> >>looking for some insight on how best to underfill these parts. Is
> manual
> >>equipment sufficient to do this? Any input as to materials & methods
> would
> >>be appreciated.
> >>
> >>Thanks in advance,
> >>
> >>
> >>Rick Thompson
> >>Ventura Electronics Assembly
> >>2655 Park Center Dr.
> >>Simi Valley, CA 93065
> >>
> >>+1 (805) 584-9858 x-304 voice
> >>+1 (805) 584-1529 fax
> >>[log in to unmask]
> >>
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