Michael

Am sorry, you are wrong. Placing two tracks in parallel will halve the
inductance and the resistance. Whether it is necessary or not depends on
the reactance of the cap and track inductances at the frequencies
concerned, assuming that it's going down to an ultra-low impedance
ground plane. If the app is low-impedance, high current, high-frequency
or ultra-rapid, then my guess is that your engineer may have a sound
case. At the worst, it won't do any harm. As for the real-estate, it's
not much, is it?

Brian

"Kuczynski, Michael @ SPACENAV" wrote:
>
> I have an engineer who wants to place 2 vias per side on a 0508 capacitor
> for decoupling. (I tried to draw figure below)
> He says it will help in filtering and if it isn't done, then don't bother
> putting any caps on (idle threat)
> The fanout trace is .010 / via is an .013 / SMT pad is .035 x .080 / spacing
> between vias is .0625 (center2center)
> I think it's horse-hockey and will introdure more inductance, beside taking
> up routing channels
> I'm looking for any support pro or con on this configuration.
>
>       -------     -------
> o----|      |     |      |----o
>       |      |     |      |
> o----|      |     |      |----o
>       ------      -------
>
> Michael Kuczynski    Librarian/Sr. Designer
> L3 Communications    1-201-393-2122 (Ph)
> Space & Navigation   1-201-393-6681 (Fax)
> 699 Rt. 46 E         Mail Stop PL1/J8
> Teterboro,NJ 07680
> [log in to unmask]
>
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