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Subject:	Re: Copper contamination is wave solder
From:	Robert Lazzara <[log in to unmask]>
Reply To:	TechNet E-Mail Forum.
Date:	Mon, 18 Dec 2000 09:24:54 EST
Content-Type:	text/plain
Parts/Attachments:	text/plain (45 lines)

re: copper contamination

I believe one of the most looked-over design opportunities to reduce copper
introduction into solder pots is to cover via pads with solder mask.

The most numerous feature on most PWB designs (and still abundant on all-SMT
designs) is the PTH via. By covering the via pads in solder mask you reduce
the amount of copper exposed to the solder pot by a significant percentage
without the cost associated with via plugging.

Simply modify the solder mask layers to remove solder mask pads from the vias
locations.

For PWB vendors that use screen-applied solder mask, a small dot pattern
might be desirable to limit the amount of mask introduced into the vias, and
is something that can be created by the vendors themselves. Vendors using
curtain coat or spray-applied solder mask apparatus can run without any
modification.

An additional "plus" is that every via covered in solder mask is also an
eliminated short opportunity, either as a solder short (bridging out of
wavesolder) or as a component contact short (e.g., XTALs and other metallic
casings).

The CON to covering vias with solder mask is Test Point applications: If you
are using vias as test points for ICT or subsequent diagnostics you'll have
to ensure that the test point vias are exposed.

Cheers!

Bob Lazzara
Circuit Connect  -  Atlanta

www.CircuitConnectInc.com

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