Mark,
Along with Mitch's thoughts, the only typical reason for using thermal
reliefs is to reduce the thermal conduction at a solder joint.  For large
diameter holes, say 0.040" dia and larger, a solid connection to an inner
plane (or planes) becomes a serious issue when trying to achieve a good
solder fillet.  In many cases, the fillet will form from the side being
soldered and stop somewhere around the point where the hole plating
contacts the first inner layer.  For vias, this is typically not a problem.
Thermal conduction in a small diameter via is usually not a problem when
solder is allowed to fill the hole.
Otherwise, "someone's" suggestion has good merit.
IMHO.
Happy designing,

Roger M. Stoops, C.I.D., PCB Designer


Trimble
Engineering and Construction Division
5475 Kellenburger Rd.
Dayton, OH 45424-1099 USA
Ph: +01 937.233.8921 or +01 937.233.4574 ext 288
Fax: +01 937.233.7511


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                    Mark Gutierrez
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                    ZENP.COM>              cc:
                    Sent by:               Subject:     [DC] Thermal relief for Vias?
                    DesignerCouncil
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                    12/12/00 12:23
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                    Gutierrez





Someone here suggested that all vias connected to power and ground planes
should have the thermal relief's eliminated. Reason to
minimize inductance to power planes. I recall reading somewhere about
removing thermals could induce reliability problems. Can anyone share their
knowledge and experience with this?. IPC-2221 specifies thermal relief is
only required for holes that are subject to soldering in large conductor
areas. Wouldn't this apply to a via tied to a plane coming off a SMD land?

Mark Gutierrez

Mark Gutierrez
Senior Printed Circuit Designer
Blaze Network Products Inc.
5180 Hacienda Drive
Dublin, CA 94568
email: [log in to unmask]
www.blazenp.com

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