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December 2000

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DesignerCouncil <[log in to unmask]>
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Marius Geurts <[log in to unmask]>
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Wed, 20 Dec 2000 15:15:10 +0100
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"DesignerCouncil E-Mail Forum." <[log in to unmask]>, Marius Geurts <[log in to unmask]>
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Hi all,

I have the following question/problem.

Today there are a lot of components with special requirements regarding
thermal connections to draw the heat away from the package. I.e.
-  Power devices applications, in a SOT-143, SOT.223, TO-263, SO-8
package.
-  BGA applications with thermal via's that are connected to full GND
plane without,
   thermal relieves.

* Component specification.
To meet the component specification of these devices within in his
application, a specific land pattern and interconnection in the PCB
design is required, to provide the heat transfer.
Some component manufactures specified copper planes, wide tracks,
thermal via's etc.
to draw heat away from the package.(see attachment, example)

* DFM.
This effects also the heat transfer to the solder joint during the
reflow soldering process,
to create a good solders joint
The following DFM rules are used to provide this heat transfer during
reflow soldering.
- Via to pad distance, to prevent solder pasta floating away from the
solder pad.
- Thermal pads, connected to copper plane or width track.
- Track width restriction to the solder pad connection
- etc.

With this we have a "Design rule conflict" between DFM and of the
Component specification.

* Design Rules.
To make a good design that meets the DFM - and Component specification,
I need to know the design rules for wave and reflow soldering for this
type of SMD applications. Especially the design rules for the
interconnection of the solder pad to a copper plane or wide tracks. To
insure the Manufacturability of this package with a high solder yield in
volume production and a solder joint quality according IPC-A- 610 class
2.

Another issue is the, reflow solder temperature profile that's needed to
create a good solder joint connection to copper planes, wide tracks etc.
This must meet the component soldering heat resistance to prevent
component damages.
(ref. CECC 00802 std. Soldering methods).


* Questions.
- Who can help me with design rules for these applications, to insure a
high solder yield in volume production. And a solder joint quality
according IPC-A- 610 class 2 ?

- Are these described in a IPC standard or any other document?



Best Regards,

Marius Geurts

Manufacturing Quality Engineer Electronics
Research & Development
Oce Technologies B.V.
The Netherlands

IPC member

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