TECHNET Archives

November 2000

TechNet@IPC.ORG

Options: Use Monospaced Font
Show Text Part by Default
Show All Mail Headers

Message: [<< First] [< Prev] [Next >] [Last >>]
Topic: [<< First] [< Prev] [Next >] [Last >>]
Author: [<< First] [< Prev] [Next >] [Last >>]

Print Reply
Subject:
From:
David Hillman <[log in to unmask]>
Reply To:
TechNet E-Mail Forum.
Date:
Tue, 21 Nov 2000 18:52:40 -0600
Content-Type:
text/plain
Parts/Attachments:
text/plain (1 lines)


Hi Albert! I can shed some light on your question: Steam conditioning is

one method of determining the robustness of a tin or tin/lead printed

wiring board finish. The JSTD-003 committee has two studies which show that

steam conditioning can be used to differentiate between poor plating and

good plating for plated thru holes pwbs.  Note I didn't not say steam

"aging" - the next revision of JSTD-003 will contain this verbiage change.

There is no correlation that steam conditioning is equal to any amount of

storage time and in fact there are two studies which show that the tin

oxide produced in steam conditioning is not the same tin oxide produced

during typical storage conditions. There are several printed wiring board

fabricators which can produce a tin or tin/lead finish which can survive

hours of steam conditioning but you need to ask yourself two questions: a)

do I want to pay extra for that type of finish (nothing is free in life)?;

b) do I really need a tin or tin/lead finish which will survive steam

conditioning for the amount of storage time/conditions I expect to see in

my soldering processes?.  Most people do not need tin or tin/lead finishes

which can survive steam conditioning. Also, the JSTD-003 committee has

shown that steam conditioning is not applicable to other pwb finishes such

as OSPs or silver. The Alternative Final Finishes committee is working on a

round robin study which may produce a set of conditioning parameters which

can be used for all pwb finishes - that data should be published by mid

2001. Hope this helps.



Dave Hillman

JSTD-003 Committee Chair

[log in to unmask]











¿àÁJ·½( sylai ) Q80_5381 <[log in to unmask]>@IPC.ORG> on 11/21/2000

06:39:08 AM



Please respond to "TechNet E-Mail Forum." <[log in to unmask]>; Please respond

      to ¿àÁJ·½( sylai ) Q80_5381 <[log in to unmask]>



Sent by:  TechNet <[log in to unmask]>





To:   [log in to unmask]

cc:



Subject:  [TN] Fw:Steam Aging







Dear Technetters,

???? For IPC-J-STD-003, the solderability  test after steam aging is only

for tin and tin/lead coatings board. Why is this?  For other coatings

board, say gold or silver, do the test have the mean? If  have, how can?I

do the?test??Where can?I find?the  description about these? Please tell me.

Thanks!










ATOM RSS1 RSS2