Mark:
- A "toe down" configuration is the description applied to components such as
Small Outline Transistors (SOT's), some Light Emitting Diodes (LED's) and
some Thin Small Outline Packages (TSOP's).  It describes a lead configuration
where the leads are so short that they do not have a true heel bend and
therefor do not have an actual "foot" against the surface of the pwb.  The
lead sort of points down to the pwb surface and contacts the surface at about
a 45 degree angle.   Without a "foot" the minimum heel fillet criteria of
J/STD-001 and A-610 cannot be applied, so the requirement for a heel fillet
on components without a true "foot" (those with a "toe down configuration")
is separately described.  The heel fillet provides about 80% of the strength
of the solder connection and connection integrity is essential, especially on
toe down configurations.
Hope the above helps.  Regards, Jim Moffitt, Technical Director, Electronics
Training Advantage, Indianapolis IN

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