Scott,
This would most likely be dictated by the functionality of the board, capability of the
fabricator, knowledge of the designer, etc. and not by a design specification.
There are guides available outlining board design; however, they are just that,
guidelines not to be taken for statement of requirement.
My advice is discuss the design with the customer, explain the pro's and con's of
fabricating the board especially the registration issues. You may be surprised to learn
their designer may not have considered the manufacturability of the thing...~gasp...~
but I'm sure I'm wrong about that ~ducking to avoid flying designers loose desk
objects~
Let us know how it evolves...
Franklin D Asbell
Network Circuits, Inc.
Irving, Texas
"Scott A. Bowles" wrote:
> Scenario: We have a customer, that by design has eliminated the pads for
> nonfunctional plated through holes on internal layers because of spacing
> issues. The spacing between the edge of the hole to the edge of the trace is
> 0.007". If we drill the hole oversize by 0.005" to allow for plating, the
> spacing is then reduced to 0.0045". There is also etchback of approximately
> 0.0005" that further reduces the spacing to 0.004". Now this is before
> taking into account for any layer shift, drill misregistration, etc., that
> standard manufacturing allowances are supposed to cover.
>
> Questions to all:
> Is there an IPC design specification that states how close the edge of a
> plated through hole should be to a trace on an internal layer? What is the
> minimum spacing that you would design between a plated through hole to a
> trace, on an internal layer for a Class 2 board, realizing that performance
> and reliability is of major concern?
>
> Thanks for any input,
> Scott
>
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