Well Jack,

It appears no one else answered this. I'll take a whack at it.
(Not really my forte but I'll try)

I asked around and this is what I got back. When we add teardrops
(or snowman pads or fillets or doubleflashes) we are adding another
flash (or pad) where the trace egresses from the (original) pad.
For ET testing, the additional teardrops don't change the
nodal net ends. The Net List file lists the nodal net ends. We
(fabricators) generate a Gerber net list that is then compared to
the (customer supplied <hopefully IPC-356>) net list.
Any discrepancies are then noted and shared with the customer.

Generally when we run into problems associated with fills (traces)
it is when a design software (CAD) is using <say> 2 or 4 mil lines
to fill in planes <or shields>. Then the issue really is more of
a data crunching nightmare. Time tying up a workstation, loading
in the data, then converting the plane images to polygons
(contourizing). Then the net list checker is ran. I've never
really heard of a teardrop created from a trace (or fill).

Groovy
-----Original Message-----
From: Olson, Jack [mailto:[log in to unmask]]
Sent: Monday, July 10, 2000 1:36 PM
To: [log in to unmask]
Subject: Re: [TN] Tear drop question for inner layer and outer layer


Just out of curiosity, does a PCB fabricator care whether the teardrops are
created using traces or flashes? It seems like the teardrop shapes created
with draws would baffle a netlist checker seeing all the extra connections,
whereas the snoman or keyhole method (using round flashes) wouldn't, but I
have never heard anyone mention that. Does anyone care?

Jack

                Regarding:
                A quick comment:
                Adding teardrops (aka snowman pads, doubleflash) is very
easy for a
                fabricator to add with a CAM station (global edit). From a
design
                perspective it may be more difficult. Some software (CAD)
requires the
                teardrop placement to be specified with respect to the pad
location.
                If added to an edge or corner of a pad it may not end up on
the
                location where the trace connects to the pads. (It's getting
better
                though. Some design software packages are getting smarter.
:-))

                Now on the electrical performance side.....Be very careful
if the design
                is for RF! (Such as telecommunications) If the designer has
tweaked
                and peaked his design for HF and has modeled his design from
                an EMC/EMI perspective, adding teardrops to a short trace
                can greatly change the net capacitance to the point to where
                it may not perform as designed. : /
                It's always best to ask the customer up front or get a
blanket approval.

                IPC-2221 has great (suggested) designer guidelines showing
teardrops
                and fillets.

                Dave Hoover (aka, Groovy)


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