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June 2000

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Subject:
Re: half-a-hole
From:
Yehuda Weisz <[log in to unmask]>
Reply To:
TechNet E-Mail Forum.
Date:
Mon, 5 Jun 2000 23:14:32 -0000
Content-Type:
text/plain
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text/plain (57 lines) 
Hi Brian,
I think that specifying plated holes or any other plated features at the
edge of the board is rather safe. The tricky step comes in the final routing
step -  here you cannot go with your router bit straight near the plated
hole since it will most likely rip the plating off.

Regards,
Yehuda Weisz

----- Original Message -----
From: Brian Gaynor <[log in to unmask]>
To: <[log in to unmask]>
Sent: Friday, June 02, 2000 9:29 AM
Subject: [TN] half-a-hole


> Hello all,
>
> Anybody out there specifying plated holes at the PCB edge? This technology
can
> be found commonly in cyrstals. What's the fab. process steps involved (for
> multi-layer)? Is there any related IPC documentation?
>
> Brian.
> J
>
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