Only the few, the proud...
We have specified slotted holes and routed features at the board edge for
ground contacts.  For plated edge holes or features, this is typically the
last plating step before etch/mask/silkscreen.  Then the edge is routed
away.  This sometimes leaves a burr at one hole edge, depending on the
feature size and the skill of the fabricator (some fabricators will add
steps to their routing procedure to eliminate burrs).
For 2-layer and up this is typically no big deal. I would suggest NOT
making an inner-layer connection to this edge hole.
We had one fabricator that balked at doing the extra steps involved because
it did not fit in with their production process, but they did it anyway;
check with your fabricator... most will do it for a few extra cents.
Somebody else can probably shed more light on subject, even give us an IPC
spec that cover this... (they say I'm not the brightest candle in the
dark...can't see me for all the other candles out there...)

 Roger M. Stoops,       PCB Designer

 Spectra Precision Inc. Ph:     937.233.8921
 5475 Kellenburger Rd.     937.233.4574 ext
 Dayton, OH 45424-1099  288
 USA                    Fax:    937.233.7511

                        Member IPC
                        Designer's Council,
                        C.I.D.







                    Brian Gaynor
                    <Brian.Gaynor@AR        To:     [log in to unmask]
                    TESYN.COM>              cc:
                    Sent by: TechNet        Subject:     [TN] half-a-hole
                    <[log in to unmask]
                    >


                    06/02/00 09:29
                    AM
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                    Please respond
                    to Brian Gaynor





Hello all,

Anybody out there specifying plated holes at the PCB edge? This technology
can
be found commonly in cyrstals. What's the fab. process steps involved (for
multi-layer)? Is there any related IPC documentation?

Brian.
J

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