Michael,

Gaby's methods pretty much reflect our incoming procedures.  We have certified suppliers,
based on quality and delivery, that get the skip lot treatment.  I would just want to
comment that the laws of probability do not seem to apply in skip lot programs.  All
problems occur on skipped lots and never on inspected lots - forgive the slight
over-statement.  ;^)

Gary Camac

Gabriela Bogdan wrote:

> Michael,
> Your problem is very real, we perform incoming inspection for printed circuits.
> I will not go into many details, but :
> Visual inspection is done for each lot on a sample basis, as well as dimensional
> testing.
> Cross sections for copper thickness in holes and solderability are done following a
> skip lot program based on supplier, number of layers, PCB, and supplier history.
> We try to order only from suppliers with good history, thus we can widen the intervals
> between tests.
> New suppliers are tested for each lot for a while, and if successful, they enter the
> skip lot.
> We are a CM , and do the purchasing too, being totally responsible for the assemblies.
> Gaby
>
> Michael Blackburn wrote:
>
> > The company I work for is in the process of moving from inspecting incoming
> > pcbs to a "dock to stock" program. Also, we are outsourcing more of our pcb
> > assemblies and the feeling is that the CM should be responsible for the
> > quality and reliability of the bare board.
> >
> > Does anyone have feedback about dock to stock programs? What kind of SPC are
> > you doing? Is a thourough audit of the board vendor and CM enough? What kind
> > of scrap/defect rates are you seeing?
> >
> > The reason I'm asking about this is because in a recent post about baking
> > boards, someone responded that they were doing copper plating thickness
> > measurement in the wall of the PTH. We experienced the same problem (blow
> > holes) and ended up doing the same test.
> >
> > I would appreciate any feedback/experiences you might have.
> >
> > Sincerely,
> >
> > Mike Blackburn
> >
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