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Reply To: | TechNet E-Mail Forum. |
Date: | Mon, 19 Jun 2000 16:10:38 -0400 |
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From: Paul M Fly
James,
Are these flipchip parts you plan to use ASICs you have some control
over? A problem we have seen
when working with bare die is when the vendor does a die shrink. The
location of I/O can shift dramatically!
With obvious effects when you try assembling parts to your boards.
*********************************
Paul Fly
Eastman Kodak Company
Engineering Technology Center
901 Elmgrove Rd.
Rochester, New York 14653-5313
Phone: (716) 726-5670
Fax: (716) 726-0275
E-mail: [log in to unmask]
*********************************
"Terveen, James/@NARDAEAST" <James.Terveen on 19/06/2000 15:20:27
Please respond to "TechNet E-Mail Forum." <[log in to unmask]>; Please respond
to "Terveen, James @ NARDAEAST" <[log in to unmask]>
To: [log in to unmask]
cc: (bcc: Paul M Fly/243609/EKC)
Subject: [TN] Flip chip
We are in the process possibly using a number of flipchip components on a
new design. I know that a number of you out there have used them already.
Just was wondering what pit falls I may not want to fall into or just an
overall do's and don'ts when it come to using them... Thank in advance
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