Mike, regarding dock to stock and some of the comments from other technetters, let me mention a small book, "How to Perform Skip-Lot and Chain Sampling" by Kenneth Stevens.  It is volume 4 in the American Society for Quality's Statistical Techniques series.  The fundamental idea is that you select the "quality level" in terms of Lot Tolerance Percent Defective and Acceptable Outgoing Quality Limit, then find a suitable sampling plan which will have a "clearance number" and "sampling fraction".  You have to inspect the clearance number consecutively with no rejected lots, at which point you can go to inspecting every 1/sampling fraction lot.  If you find a problem while in the sampling mode, you go back to having to inspect the clearance number consecutively with no rejects before returning again to sampling fraction mode.  If your clearance number is large, the sampling fraction can be low, "dock to stock".

There have been lots of variations on this basic idea.  

Lou Hart
----------
From:   Michael Blackburn[SMTP:[log in to unmask]]
Sent:   Thursday, June 01, 2000 12:01 PM
To:     [log in to unmask]
Subject:        [TN] PCB Inspection

The company I work for is in the process of moving from inspecting incoming
pcbs to a "dock to stock" program. Also, we are outsourcing more of our pcb
assemblies and the feeling is that the CM should be responsible for the
quality and reliability of the bare board.

Does anyone have feedback about dock to stock programs? What kind of SPC are
you doing? Is a thourough audit of the board vendor and CM enough? What kind
of scrap/defect rates are you seeing?

The reason I'm asking about this is because in a recent post about baking
boards, someone responded that they were doing copper plating thickness
measurement in the wall of the PTH. We experienced the same problem (blow
holes) and ended up doing the same test.

I would appreciate any feedback/experiences you might have.

Sincerely,

Mike Blackburn

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