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June 2000

DesignerCouncil@IPC.ORG

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DesignerCouncil <[log in to unmask]>
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"Hurst, Joe" <[log in to unmask]>
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Mon, 12 Jun 2000 12:47:19 -0400
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Chris

        I believe IPC-2221, Section 6.3 mentions layer to layer spaces.

        I do not think this was in ...275.

Joe Hurst, CET
PWB Designer
Computing Devices Canada
A General Dynamics Company
[log in to unmask]
613-596-7816


-----Original Message-----
From: Chris Robertson [mailto:[log in to unmask]]
Sent: Monday, June 12, 2000 12:07 PM
To: [log in to unmask]
Subject: [DC] Dielectric thickness


I normally treat layer to layer distance (finished) the same as the trace to
trace limits for voltage requirements.
In other words if a trace needs to be 16 mils apart (internal) than the
layers need to have a 16 mil from copper to copper.

Is this overkill? I've not found a page in the IPC spec that specifically
address this. Does anyone have an idea? Spec?

Chris Robertson
Designer
Lockheed - Martin Services, Inc.
4912 Research Dr.
Huntsville, AL 35805
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Ph/Fax (256) 722-2626
ICQ# 13541566

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