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May 2000

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Subject:
From:
"CHONG,CHEE-LEONG (A-Malaysia,ex1)" <[log in to unmask]>
Reply To:
TechNet E-Mail Forum.
Date:
Thu, 11 May 2000 16:41:55 +0800
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text/plain
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text/plain (184 lines)
Shirley,

Beside looking at Cu balance. You should pay attention to the solder mask
balance. My experience telling me that solder mask play a much more
important role than Cu if your board is subjected to reflow. I once
experienced a board turn into a bowl after reflow and by just balance the
solder mask layout we got a perfect board.

Good luck to you.

-----Original Message-----
From: Shirley Xiao [mailto:[log in to unmask]]
Sent: Wednesday, May 10, 2000 3:55 PM
To: [log in to unmask]
Subject: Re: [TN] Circuit board material for SMT board


  Phil:
  Thanks for your quick response. I do appreciate your
help. Maybe I need to describe the board more detail:
  1.Double sided board (FR-4 laminate,Tg=130C)
  2.Overall thickness 1.6 mm (8 ply of 7628 with H/H
copper foil on both sides)
  3.Balnced design of copper trace on both sides
  4.Minimum IC pitch is 0.75 mm
  Is it defined in any IPC specification that board
use 0.5 mm pitch IC have to meet warpage less than
0.7% and otherwise have to meet 1.0%.

  Thanks and all the best regards
  Shirley Xiao


--- Phil Bavaro <[log in to unmask]> wrote:
> Does the board design use 0.5 mm pitch components?
> If so then the 0.7%
> applies, if not then the 1.0 % applies.
>
> My experience is that it is the design that dictates
> the warpage after
> reflow and wavesoldering.
>
> If the design is not metal balanced for expansion
> stress, it will warp.
>
> You can prove it by taking a board construction and
> not etching the copper
> off on all layers but put the soldermask on like
> normal.
>
> Have them process it through reflow and wavesolder
> and measure what
> results.  You should find it to be well within the
> 0.7%.
>
> Build the same board with the normal inner layers
> but solid copper on the
> outside.  If it warps, it is the design.
>
> It is usually a losing battle to try to get
> designers to redesign without
> such data to show them.
>
> Changing to high Tg will not help a badly designed
> board not warp thru
> reflow and wavesolder, but it is possible to reverse
> warp such boards after
> they have been processed so that they will fit into
> the card cages.  The
> lower the Tg, the easier it is to fix.
>
> Hope this helps.
>
>
>
> At 10:15 PM 5/9/00 -0700, you wrote:
> > We use standard FR-4 laminate (Tg=130 C) to
> produce
> >1.6 mm thick double sided PCB for a
> telecom-switch-box
> >customer (laminate construction is 8X7628 with H/H
> >copper foil) . My customer require warpage less
> than
> >0.7% after reflow and wave soldering because the
> cards
> >need to be inserted into slots of machine racks.
> They
> >are looking for warpage less than 0.5% in three
> >months. We tried three different laminate vendors,
> but
> >in the end all have about 6% fall out of 0.7% after
> >reflow and wave soldering. My customer confirmed
> that
> >their reflow & wave process is under control. The
> >laminate vendors said use standard FR-4 laminate
> >(Tg=130 C) will  lead to certain percentage fall
> out
> >of 0.7% (so that IPC-4101 defines laminate warpage
> >less than 1.0% for 1.6mm thick laminate).
> >   My questions are:
> >   1. Is it true that use standard FR-4 laminate
> are
> >sure to have certain percentage >0.7% warpage?
> >   2. Is it true that use high Tg FR-4 laminate
> will
> >have better warpage result?
> >   3. What material is recommended by IPC-D-275 and
> >IPC-D-279 for SMT board? Is high Tg preferred?
> (Sorry
> >I don't have IPC-D-275 & IPC-D-279 on hand)
> >
> >   Any comments will be greatly appreciated!!!
> >
> >   Thanks in advance!!!
> >
> >   Shirley Xiao
> >
> >
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