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April 2000

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Subject:
From:
TOE /Torben Østeraa <[log in to unmask]>
Reply To:
TechNet E-Mail Forum.
Date:
Wed, 5 Apr 2000 20:41:43 +0200
Content-Type:
text/plain
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text/plain (119 lines)
FYI
Boards made to the European Space-specification (CNES), reflowed,
are allowed to have visible copper on 2/3 of the vertical areas.
Don´t ask how it´s measured!, but it does signal acceptance of 
exposed copper in that application. And yes, it is after all just a
reflection of the fact that a good etch with minimal undercut and 
a good etch-factor leaves only very little solder to cover the edges....

Torben Østeraa
Printca AS


> -----Oprindelig meddelelse-----
> Fra:  Howieson, Rick [SMTP:[log in to unmask]]
> Sendt:        5. april 2000 20:11
> Til:  [log in to unmask]
> Emne: Re: [TN] Exposed copper around the periphery of anular pads..
> 
> Vertical areas do not need to be covered. The vertical edges do not get
> plated (Tin/Lead) due to the photo resist and when fused the tin/lead
> typically will not wet down the edges.
> Rick
> GTC
> 
> >-----Original Message-----
> >From:  Stephen R. Gregory [SMTP:[log in to unmask]]
> >Sent:  Wednesday, April 05, 2000 9:56 AM
> >To:    [log in to unmask]
> >Subject:       [TN] Exposed copper around the periphery of anular pads..
> >
> >Hi ya'll!
> >
> >I got called back to incoming this morning to look at a PTH board that
> shows
> >exposed copper, but it's only at the side edges around the periphery of
> the
> >anular pads...it's like this over the whole board. The top surfaces have
> >tin/lead plating, but not the side edges.
> >
> >                            Top surface of pad is plated
> >                                               |
> >                                ________V_________
> >__________________|__________________|__<-----Exposed copper on sides
> >
> >                                            PCB
> >
> >Is this a defect? Looked in the IPC-A-600F on page 85, (3.3.10 Solder
> coating
> >thickness) and there's a conflicting statement I think. It says;
> Acceptable -
> >Class 1,2,3, "Solder coating thickness is uniform. Vertical (conductor
> and
> >land) areas may not be covered. No exposed copper is evident."
> >
> >On one hand it says that the vertical surface may not be covered, but on
> the
> >other hand it says you can't have exposed copper. If the vertical surface
> >doesn't have to be covered, then you're gonna have exposed copper. So
> which
> >is it?
> >
> >Also there's a statement at the bottom of the page that visual
> observations
> >are made on cross sections only. I can see this with my own two
> >eyeballs...don't need a cross section to see it.
> >
> >This board is for a hi-rel product by the way....
> >
> >Thanks!
> >
> >-Steve Gregory-
> >
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