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April 2000

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Subject:
From:
Martin Christie <[log in to unmask]>
Reply To:
TechNet E-Mail Forum.
Date:
Fri, 7 Apr 2000 13:26:00 +0100
Content-Type:
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Hi Technetters,

I have a problem with cracked surface mount resistor network. The cracking
occurs after de-panelisation. I have confirmed this electrically and
visually (at up to x35 mag). The current fallout is about 5%. The board is
0..070" (1.8mm) thick and v-scored from both sides. De-panelisation is by
means of a "bacon slicer" (rolling v-shaped blade approx 4" diameter). The
network is located 0.032" (0.8mm) away from the v-groove.


_____________________________________________________  V-score edge
                                           ____________________
                                           |        /               \
 |
                                           |____/                  \____|

                                                  |                    |
                                           ____|                    |____
                                           |
 |

Resistor network with diagonal cracks from stress points


The question I have is: does anyone know of any guidelines with respect to
minimum component mounting distance away from the v-groove in a situation
like this?

Also, is there an algorithm anywhere that can be used to calculate stress
involved?

Thanks


Martin Christie
ACW Technology Ltd.,
Hylton Road,
Petersfield,
Hants.
GU32 3XX
Tel: 01730 300000 ext 146
Fax: 01730 266045
e-mail: [log in to unmask]

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