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March 2000

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Subject:
From:
Michael Forrester <[log in to unmask]>
Reply To:
TechNet E-Mail Forum.
Date:
Thu, 2 Mar 2000 12:19:31 -0500
Content-Type:
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Our boards are primarily fine pitch surface mount.  We currently have a problem
with the height of the solder mask over our via's being
too high causing the solder stencil not to sit flat to the board.  The height of
the vias solder mask included) are 4 mils higher than the rest
of the board (including solder mask  I believe the actual problem is that we
have the vias filled with epoxy and the
height of the epoxy in relation to the top of the via pad is too high.  Is there
a spec (IPC,JEDIC,MIL) that covers such an issue?  If not, what
do others spec out to insure that there is no interference from "lumps".  Thank
you.

Best Regards,

Mike Forrester
LeCroy Corp.
[log in to unmask]

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