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Subject:
From:
"Kelly M. Schriver" <[log in to unmask]>
Reply To:
TechNet E-Mail Forum.
Date:
Wed, 8 Mar 2000 06:41:14 -0600
Content-Type:
text/plain
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text/plain (133 lines)
Hi Ed -

Yes, that is correct.  This condition existed in areas of the board which
had a high density of copper, ie, under BGAs and large QFPs.  The design was
for an advanced single card computer and was packed almost to the limit with
circuitry, vias and pads.  Ground and power plane areas were highly
perforated by via clearances so they were not considered the sole driving
factor in these results.  I guess the main message is that the TCE of any
composite structure will be a sum of its properties at that specific site.

If you feel your design establishes this sort of situation a bit of bare
board testing might be in order before going too much farther.  TCE
measurement of the parts might also be a good idea, so you're working with a
set of real numbers.

Regards - Kelly
-----Original Message-----
From: Louis, Edwin @ CSE <[log in to unmask]>
To: 'TechNet E-Mail Forum.' <[log in to unmask]>; 'Kelly M. Schriver'
<[log in to unmask]>
Date: Monday, March 06, 2000 1:50 PM
Subject: RE: [TN] Alloy 42 Leaded TSOPS


>What I infer from your E-mail is that even with 1/2 oz Copper interlayers,
>the CTE of a PWB
>constructed from it ended up with a CTE of that of Copper even with
>aramid/polyimide or
>aramid/Epoxy. Is that correct?
>
>-----Original Message-----
>From: Kelly M. Schriver [mailto:[log in to unmask]]
>Sent: Saturday, February 19, 2000 5:34 PM
>To: [log in to unmask]
>Subject: Re: [TN] Alloy 42 Leaded TSOPS
>
>
>Hi Ed -
>
>In a scan of posts on this subject by the rest of the gang, they have
>already noted that the nickel/iron lead material family (which includes
>alloy 42) has been around for a long, long time.  Most specifically, on
>military ceramic bodied flatpacks, ceramic quad packs, etc., use in hi-rel
>hardware for many years.  The TSOP package is similar in style to these
>items and should produce no problems that are new or different.  I would
>expect that the leads would have some amount of compliance.  If your
devices
>are in a plastic body, then that's still another plus in a TCE match to the
>board.  It might be reasonable to have a few parts measured to determine
>their actual TCE over your operating temperature range, before going much
>farther.
>
>The wild card in this whole equation, however, may not be the laminate
>material.  It may well be the amount of copper in the circuit board zones
>immediately under the components themselves.  We designed and built a 16
>layer high density multilayer a couple of years ago.  Specimen were
>fabricated from both polyimide/glass (12-14 PPM/deg C) and non-woven
>aramide/polyimide laminates (low TCE ~5-8 PPM/deg C as I recall).  Copper
>thicknesses were held to 1/2 oz. on all layers.  When we had an ITL perform
>TCE measurements over a range of -55/+125C, guess what the plots looked
>like?  Almost identical to copper at 17.5 PPM/deg C.  We couldn't tell the
>specimen apart, without reading the title on the plots.
>
>Let us hear what you learn, and good luck.
>
>Regards - Kelly
>
>
>
>-----Original Message-----
>From: Louis, Edwin @ CSE <[log in to unmask]>
>To: [log in to unmask] <[log in to unmask]>
>Date: Friday, February 18, 2000 1:16 PM
>Subject: [TN] Alloy 42 Leaded TSOPS
>
>
>>We have a sole source for  TSOP components, in which, they are only
>>available with alloy 42 leads. The vendor refuses to build the parts with
>>Copper leads because the  CTE of alloy 42 better matches the die CTE and
as
>>result they have fewer component failures and defects.
>>
>>Does any one know of a PWB material that would better match the CTE of
>alloy
>>42 leaded TSOPs?
>>
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