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I had implemented this on my innerlayer line several years ago. We ran
several tests using faults after t/u vs. faults on no t/u. In all
cases our yields were much better after no t/u. I don't have any hard
data to show you as I was with a different co.
We did spend a significant amount of time on the preclean, image side
of the process. An ounce of prevention yada, yada, yada.....
Hope this helps,
Mike
______________________________ Reply Separator _________________________________
Subject: [TN] Zero TU
Author: "Howieson; Rick" <[log in to unmask]> at smtplink-hadco
Date: 2/16/00 11:12 AM
This is for the board fab gurus. Has anyone out there implemented a Zero
Touch-Up program and if so, how did you go about doing this, i.e. was it
based on yield data? or drop of the hat?
All responses much appreciated.
Rick Howieson
http://www.gt-corp.com
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