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January 2000

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Subject:
From:
Douglas Pauls <[log in to unmask]>
Reply To:
TechNet E-Mail Forum.
Date:
Fri, 28 Jan 2000 07:56:52 EST
Content-Type:
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In a message dated 01/27/2000 1:06:45 PM US Eastern Standard Time,
[log in to unmask] writes:

>
>  With the greatest possible respect to SIR Doug (and I really do not relish
>  such a challenge!) I consider that there is a way that permits /
facilitates
>  at least a reasonable comparison.

Aww stop it, you're embarrassin' me.

>
>  If you process your test coupons using EXACTLY the same manufacturing
>  processes AND chemistries that your final production assembly will see,
then
>  you have a pretty accurate picture of the results you can expect in
>  production.

Yes.  This is a conversation that I have with many clients when we talk about
qualifying a manufacturing process.  In MIL-STD-2000 and J-STD-001A, the
IPC-B-36 test board was used as the substrate with bare copper metalization,
no solder mask (or very little), FR-4 laminate, and precleaned.  The question
that came up frequently was "how representative was this of the residue load
on actual product that was masked with tin-lead, possibly conformally
coated?"  A good question.  When Appendix D of J-STD-001B was written, we
stipulated that the test substrate, whatever was used, needed to be made by
your fabricators, with your laminate, with your mask, processed with your
fluxes and pastes, and coated with your coatings.  This made the test vehicle
much more representative of the residue load your product would be expected
to have.

Although the C revision of J-STD-001 is almost finished, the approach in the
current Appendix D is not changed measurably, other than to become Appendix
B.  Hey, a few more revs and we might work it up into the document itself.

>
>  We here, have been carrying out extensive SIR test projects which may well
>  form the basis of new "Process Validation Test" standards.

Graham is a little spam-shy.  He is talking about frequent monitoring where
measuring SIR on an hourly, or more frequent basis, may yield as much useful
information in 24 hours as we now get in 7 days.  Brian Ellis of Protonique
has also presented a few papers on using an 8 hour SIR test to predict longer
term SIR performance.

>
>  Naturally the test coupon MUST lend itself to such tests i.e.: it MUST be
>  able to accept component overmounting of the test patterns so that you can
>  best mimic production circumstances.

A good point.  Components give all kinds of shielding effects that you don't
see with a purely flat test board.  One important item to note is that if
your test pattern examines the insulation resistance from mounting pad to
mounting pad, then the component you use MUST have no internal die inside.
These are usually special orders.  If you order such parts from TopLine, make
sure it has the -ISO extention (stands for ISOLATED).

>
>  Of course if you were able to make available a redundant area underneath
>  components the could be home for a test site/pattern, then you have the
>  better circumstance.

Yup.

Doug Pauls
CSL

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