I have to strongly disagree with John Gulley about laser blind via
drilling. Yes, if you have a lot of vias per panel may be the "currently
available" laser machines are not fast enough. But for most of the boards
that I've seen, laser drilling is a cost effective way to create blind
vias.
We have done analysis that shows we can price laser via board lower than
their through via board counterpart (through layer reduction). We have
also seen other boards priced below their plasma drilled counterpart. It
is a win-win situation for both the customer and ourselves.
I agree that not all boards can be redesigned the same way. Also, not all
board manufacturers are set up the same way. What makes sense is whatever
fit to their process flow and existing equipment. I'm not here to debate
about which method is the way for the year 2000. There are pros and cons
in every approach and throughput is not the whole story. The key is, I
don't think the majority of the industry sees laser blind via drilling as
an unattractive method. In Japan, people either use photo via (similar to
IBM SLC), or laser blind via.
Mason Hu
Zycon Corporation
______________________________ Reply Separator _________________________________
Subject: Re[2]: Plugged Vias
Author: [log in to unmask] at corp
Date: 10/17/96 9:14 AM
Jim,
Merix Corporation, Beaverton, OR for sure and possibly North Texas
Circuits, Grand Prarie, TX (low volume, military, high tech).
Merix has a process similar to what you are explaining but is simplier
to process. Its similar to the blind via process but uses the Plasma
Desmear Removal Process from years back versus hard tool or Laser
depth drilling. From what I understand, they are looking into Laser
depth drill, but as with most of the industry, the cost can not be
justified based on drill throughput.
The realestate saved by this process is enormous, considering internal
routing is increased multifold.
Example Process:
1. Add cap layers to the comp and sold sides (sequential lamination)
2. Coat externals caps with resist
3. Expose resist only exposing copper pad interconnect
4. Develop
5. Etch exposed copper pad exposing resin within the SMT Land
6. Plasma etch resin until interconnect copper is exposed NOTE:
Glass based C & B stage materials can not be used since the Plasma
does not glass etchback. Since the Plasma is isotropic it will
tend to remove resin evenly in all directions (this from what I
understand is being resolved).
7. Another etch process further exposing the underlying copper.
8. Electroless plate and so on.
The above is based on my review of there process and technical data.
I advise you contact Merix for further info.
As of now this system is self limiting since the interconnect can only
be made one layer below. Depending on your software routing this can
easily be overcomed.
Regards,
John Gulley - QA
Inet Inc.
1255 W. 15th St, Ste 600
Plano, TX 75075
972-578-3928
______________________________ Reply Separator _________________________________
Subject: RE: Plugged Vias
Author: Jim Marsico 516-595-5879 <[log in to unmask]> at Internet
Date: 10/15/96 3:35 PM
We've been using plugged vias in SMT pads for years. Our design calls for a
.020" via in the solder pad. The back side of the multilayer board is capped
with a polyimide layer to prevent the vias on the back from shorting to a
restraining core which the boards are bonded to after assembly. During the
cap layer bonding process, the vias are filled with a polyimide resin which
flows up to the top of the vias. We then require the fab house to over-plate
the pads, including the polyimide resin-filled holes with copper, then solder
coated. The end result is a via in a pad that is, for the most part,
undetectable.
This design worked great over the years, although the art of performing this
process seems to have been lost since it's now difficult to find a fab house
who can supply a quality product consistently (military qualified, low
volumes).
If anyone knows of a board vendor who can build such a board, please let me
know.
Thanks,
Jim Marsico
(516) 595-5879
[log in to unmask]
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