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April 2000

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Subject:
From:
Franklin Asbell <[log in to unmask]>
Reply To:
TechNet E-Mail Forum.
Date:
Fri, 7 Apr 2000 08:25:19 -0500
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Dave,

A good method we would use is to cut a trace or two. This ensures electrical
test failures and subsequent segregation prior to final inspection.

Franklin D Asbell
Quality Assurance Manager
Network Circuits, Inc.
Irvning, Texas

----- Original Message -----
From: Dave Kell <[log in to unmask]>
To: <[log in to unmask]>
Sent: Thursday, April 06, 2000 2:46 PM
Subject: [TN] Reject Identification


I am wondering if anyone has a good method of marking rejects on internal
layers of PCB's such that they are detectable on the external layers.  We
are a flex-circuit manufacturer and this has not been a problem on lower
layer counts, but more opaque materials make internal marking hard to
detect.  Keep in mind that these rejects are not always opens or shorts, but
may be pattern width or spacing violations.

Any help would be appreciated

Dave Kell
Product Assurance

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