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July 1998

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Subject:
From:
James R Payne <[log in to unmask]>
Reply To:
TechNet E-Mail Forum.
Date:
Tue, 28 Jul 1998 13:25:06 -0600
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     With increased layer count and ground plane shielding requirements we
     are having trouble obtaining the 75% vertical fill requirement(IPC
     J-STD-001B) for through-hole leads.

     A typical application is a 16 layer polyimid board about .120 thick.
     This board has one ground plan and several sectional voltage planes.
     The board will be part of a GPS satellite system with a 15 year
     mission.  We will install 15, 220 pin through-hole motherboard
     connectors on the board.  Our boards are fabricated in lots of two or
     three.

     In the past all our soldering was done by hand and we required 100%
     vertical solder penetration from the source side to the destination
     side.  As our boards have become thicker we went to wave soldering to
     get proper penetration. Now with thicker boards that is not always a
     reliable method.  More I/O requirements have pushed us to four row
     connectors making it impossible to inspect on the inside pins anyway.

     With current printed circuit board manufacturing techniques I am
     wondering if barrel reliability is good enough to only command good
     wetting on the source side and let the penetration be what it will.

     I think all of industry has stopped putting "Z" wires in unused vias
     to ensure barrel reliability.  Can I stop using the connector pin for
     the same reason?  Are there other issues to be concerned with?

     I am interested in any data or testing someone has done or just plain
     opinions.

     Thank you Jim Payne, Sandia National Labs (505) 844-3336

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