TECHNET Archives

1996

TechNet@IPC.ORG

Options: Use Monospaced Font
Show Text Part by Default
Show All Mail Headers

Message: [<< First] [< Prev] [Next >] [Last >>]
Topic: [<< First] [< Prev] [Next >] [Last >>]
Author: [<< First] [< Prev] [Next >] [Last >>]

Print Reply
Subject:
From:
"John Parsons" <[log in to unmask]>
Date:
Wed, 30 Oct 1996 11:26:12 -0800
Content-Type:
text/plain
Parts/Attachments:
text/plain (28 lines)
A customer of ours has the following question(s):

1.  We are currently working mostly on surface mount cards and a concern
has arisen about solder flowing thru via's during the reflow process and
shorting surface mount pads together as well as shorting vias's together.
Via spec is currently 0.020 hole on a 0.040 pad.

a)  Does anyone seen this sort of problem associated particularily with
20mil pitch devices.
b)  If yes, does simply covering the vias with mask (LPI) eliminate this
problem, or must the vias be "Capped".

Any insight into this would be appreciated.

Regards
John Parsons
Pre-Production Engineering
Circuit Graphics Ltd.

***************************************************************************
* TechNet mail list is provided as a service by IPC using SmartList v3.05 *
***************************************************************************
* To unsubscribe from this list at any time, send a message to:           *
* [log in to unmask] with <subject: unsubscribe> and no text.        *
***************************************************************************



ATOM RSS1 RSS2