Hi All

Hope some one can help?  We have have a board from a customer which has a
PSSop-16 with a Backside Ground ( #RF2119DBP).  The stencil house has made
a cutout that is slightly smaller then the ground on the device.  The
ground plane area on the card is basically the size of the body of the part
with 10 via holes in it.
The customer wants evidance of solder reflow on the ends (Tinning of the
Gold Plate).  Current stencil does not get enough paste to do this and we
are concerned that if we make the cut out larger then the device contact,
the part may ride on top of the extra solder and result in
opens/insufficients on the leads.  Also I have been unable to find a
recomended land/paste pattern for this type of device.
Any ideas would be appreciated.

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