Does anyone know a sensible guideline for how much space to leave between 
conformal coated areas and other areas that should NOT be coated?

We have some high voltage areas of circuitry that need to be coated, near other 
connectors and mounting holes that will not be coated. The problem is, the 
assembler is asking for far more "isolation" than the engineers! 
(might it be a different clearance for manual vs. in-line?) 

Seems like this would be common knowledge, but I just can't find it anywhere...

thanks,
Jack

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