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From:
"Kasprzak, Bill (esd) US" <[log in to unmask]>
Date:
Fri, 27 Sep 96 10:16:00 PDT
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We are in the process of trying to comply with the provisions of J-Std-001A, 
Appendix D-4.1, which basically states that level 2 testing (SIR test, Ionic 
Contamination, and visual inspection) needs to be done to qualify your 
process for the use of water soluble fluxes. I have the IPC-B-36 Circuit 
boards and the 68 Pin LLC's needed to run the test. I was quite surprised to 
see that my IPC-B-36 boards have copper lands and traces on the boards. 
There is a document called IPC-TP-1044 which outlines an oven bake process 
followed by a microetch process using Enplate PC-499, cascading water 
rinses, and other materials (18 steps in all !). This microetch process is 
followed by Omegameter 600SMD process and then followed by board drying in a 
nitrogen autoclave. The boards were then placed in Kapak bags which were 
"tested" to be non-contaminating.
I have the following questions:
 - Why do the boards have copper traces ? Why aren't they tin-lead ready for 
soldering ?
 - Is there a simpler way to get these boards clean in preparation for 
soldering ?

Thanks,
Bill Kasprzak, Moog Inc., 716-652-2000 ext 2507 

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