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1996

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Subject:
From:
"LISA GREENLEAF" <[log in to unmask]>
Date:
27 Aug 1996 15:34:50 -0400
Content-Type:
text/plain
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Paragraph 3.4.1.2.2 of MIL P 55110E allows the use of foil lamination when the
pregreg is purchased to 13949 and the foil is purchased to IPC-MF-150.
Paragraph 3.6.4.8 (as invoked by Group B Testing; Table 8) requires that the
foil lamination process is subjected to the peel strength test described in
4.8.4.8 as part of the group B monthly routine only when product with foil
lamination  has surface conductors or surface mounts lands  (test not
applicable if no foil lamination or only foil lamination on
pads-only-outer-later.  The testing is to be done at a lab which has
suitability status to 13949, but the board manufacturer does not certify
facility or product to 13949.

Lisa Greenleaf
Teradyne Connection Systems
603-791-3118

--------------------------------------
Date: 8/27/96 3:29 PM
To: LISA GREENLEAF
From: [log in to unmask]
     I believe this changed quite sometime back. You could submit foil lam 
     provided you met peel strength values. I even had my Group B done 
     along with this peel strength test.
     Someone from one of the independent labs may shed some more light
     on this than I can.
     
     DHH
______________________________ Reply Separator
_________________________________
Subject: Military spec interpretation
Author:  [log in to unmask] at SMTPLINK-HADCO
Date:    8/27/96 1:58 PM


When producing multi layer PCBs to MIL-P-55110 we have historically used a
"cap" build.,as the
interpretation was that to use a "foil" build we would have to get approval
under MIL-P-13949,a laminate
spec.. Is this the general concensus or are people using foil builds against
the 55110 spec??
Regards
               Paul Greene

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