Good day technet:

We're considering designing a multilayer polyimide PWB with a number of vias
(approximately .021" diameter holes, .062" thick PWB) that are plated shut,
for thermal reasons.  Can anyone comment on pitfalls regarding the fab
process?  How about voids in the solid copper via?  Entrapped plating
solution?

All comments are appreciated.  Thanks in advance...

Jim Marsico
Senior Engineer
Production Engineering
EDO Electronics Systems Group
[log in to unmask] <mailto:[log in to unmask]>
631-595-5879

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