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1996

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Subject:
From:
"LARRY A. STERNIG" <[log in to unmask]>
Date:
Wed, 24 Jan 1996 12:24:14 -0600
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 .int [log in to unmask]
 The net list test protects you from BIG screwups where the whole lots is the
 same - All wrong - but the same so it passes a learned test. These screwups are
 just as often the customers problem as the FAB makers problem and is a very
 good idea to net list test. Ever assemble a few hundred large PWAs and then
 find they ALL have the power to ground short you designed in and in a hard to
 rework place too?

 As far as occasional opens / shorts. Sometimes the test is incomplete and not
 detecting the error. This  could be because a flip test will miss a few via on
 surface mount PWBs. Or a missing pin or poor fixture design with a learned
 program if they re-learn every lot.. Often the problem happened after some
 thermal or mechanical event and wasnt there when tested
 Larry Sternig
 [log in to unmask]

 *** Original Author: ipc.ipc.org!ipc.org!          01/24/96  095210

 Resent-Date: Wed, 24 Jan 1996 07:37:52 -0800
 Old-Return-Path: <[log in to unmask]>
 From: BOB HOENE <[log in to unmask]>
 Subject: Electrical test efficiency.

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 Would anyone who happens to be an electrical test guru provide the
 relative efficiency of bare board electrical test and compare a "standard"
 electrical test to a "net list test". The impetus for this is our in-circuit
  test
 department wondering why they occasionally still find opens and shorts
 on "tested" boards. All responses and opinions greatly appreciated.

 Thanks,

 Bob Hoene
 Marquette Electronics
 Milwaukee, WI



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