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October 2001

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Subject:
From:
Hinners Hans M Civ WRALC/LUGE <[log in to unmask]>
Reply To:
TechNet E-Mail Forum.
Date:
Tue, 16 Oct 2001 13:29:25 -0400
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Hey Genny,

Sorry to hear about your bad boards.  Ick!

A continuity test can catch that mistake (and bad plating).  It can be done
with either a bed-of-nails or a flying probe tester.  Bed of nails requires
a test fixture to be made and the flying probe has low throughput.  Not my
primary area of expertise but others might be able to share their best
practices with ya.

You could also check them with an X-ray, especially if the boards were still
in panel (gotta love those registration areas - ok boxes, layer count,
etc.).  Just look for missing or out of place pads - most times you don't
even need the artwork.

I feel your pain!

Hans

Integrity First  -  Service Before Self  -  Excellence in All We Do
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Hans M. Hinners
Electronics Engineer
Warner Robins - Air Logistics Center (WR-ALC/LUGE)
Special Operations Forces System Program Office (SOF - SPO)
Gunship Team
226 Cochran Street
Robins AFB GA 31098-1622

mailto:[log in to unmask]

Com: (478) 926 - 5224
Fax:   (478) 926 - 4911
DSN Prefix: 468



-----Original Message-----
From: Genny Gibbard [mailto:[log in to unmask]]
Sent: Tuesday, October 16, 2001 1:07 PM
To: [log in to unmask]
Subject: [TN] PCB layers swapped


Good morning,
My morning has not been so good.  I have a build of PCB's (over 300 boards)
where two inner layers have been swapped.  The board fabricator constructed
the board in the wrong order.  These boards are RF in nature and have
frequencies approaching 2GHz on them.  In many places we put a signal trace
on the inner layer furthest from the component side and then a wide grounded
trace over it on the closer inner layer as shielding.  So not only is there
no longer shielding over many traces, these signals are also about .03"
closer to the component circuitry than they used to be.  Can you contemplate
the nightmare of spurious issues that have been created?  We did not notice
the problem until they were fully populated and almost thru our testing
process and started failing one of the tests miserably.
Needless to say, we will be revising our inspection techniques to try to
catch occurrences like this much sooner.

I was wondering if anyone knows of a way that layer order could be
electrically tested for on a bare board, that we could require our
fabricator to complete?

Genny Gibbard (mailto:[log in to unmask])

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