Why must you clean prior to coating? Is this a military requirement?

I have been coating, potting...over no clean with organics and silicones
for years with no problems with clean incoming PCBs. If you use RMA and
call it no clean, thats a different story.

Please note: some no cleans are not compatible with some or all coatings,
just do your research up front.

ARIC PARR
Sr. Manufacturing Engineer
Eaton Corp
1400 S. Livernois
P. O. Box 5020
Rochester Hills, Mi 48308-5020
[log in to unmask]
248 608 7780
Fax: 248 656 2242
-------------
Original Text
From: C=US/A=INTERNET/DDA=ID/Brent.Alcorn(a)JJMACKAY.CA, on 7/15/98 1:22
PM:
To: Aric Parr@01635@Lectron_RH,
EatonWHQ@CorpMail@WHQCleveOH[C=US/A=INTERNET/DDA=ID/TechNet(a)IPC.ORG]

[log in to unmask] wrote:
>
>      Hi everyone!
>
>      I would be appreciative of any help whatsoever on the following
>      subject:
>
>      I am currently assessing the suitability of using no-clean flux
>      technology on Class 3 Electronics - Military.  Our current
capability
>      is double sided Reflow (forced convection), Vapour Phase &
Wavesolder.
>      We assemble onto the following substrates - FR4, Copper Invar Copper,
>      Ceramic.  SMD design is currently @ 0.02" pitch, whilst currently
>      evaluating 0.016" & BGA.
>
>      I am trying to identify all areas of concern with using no-clean
flux
>      to enable me to come up with a plan for addressing/proving the
process
>      for suitability/reliability.  I believe I have identified the main
>      areas but would be interested in the experience/views of my
>      counterparts in this field.
>
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If you are going conformal coat the PWBs then this will be a concern.
The boards MUST be cleaned if conformal coating is to be used.

Regards,
Brent

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