I am interested very much in depanelising  i.e. singulation of circuits from 
panels after assembly. I will appreciate info on that on email.

dhawana @winpo2.ca.unisys.com
 ----------
From: [log in to unmask]
To: [log in to unmask]
Subject: Re: DES: Panelization
Date: Thursday, June 05, 1997 6:06PM


I would be interest too, although I will probably not be at the Expo

*** Forwarding note from I4221459--IBMMAIL  06/05/97 13:53 ***
From: "Andrew G Kettlewell"<[log in to unmask]>
To: [log in to unmask]
Date: Thu, 5 Jun 1997 12:48:45 -0600
Subject: Re: DES: Panelization





I too would be interested.

Andrew Kettlewell
Onan Power Electronics








[log in to unmask] on 06/04/97 04:17:49 PM

To:   [log in to unmask]
cc:    (bcc: Andrew G Kettlewell/PGG/Cummins)
Subject:  DES: Panelization




I would contemplate doing a paper for the upcoming (Sept '97) PCB Expo if
there is enough interest. I have done one in the past when I was affiliated
with the Cadstar Users Group and it was well received back then. I know
that there has been a few inquiries here on Technet of late regarding
panelization that is what perked my interest. I believe that I can get the
support from my employer for such a project.

Steve Collins
PCB Design Supervisor
Antec Network Technologies - Juarez


Sorry if this went through twice but I got an "Message not deliverable" the
first time around.

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