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Date: | 18 Jun 97 08:33:56 EDT |
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We have tried plugging vias by applying paste to them during stencil
printing. The problem with this approach is that the hole does not
receive enough paste to completely fill. The concave fillet formed
traps flux residue that is difficult to wash out. Needless to say,
the flux residue is not condusive to incircuit test probing.
Gary Camac
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Subject: plugged vias
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Date: 6/17/97 1:04 PM
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Subject: plugged vias
To: [log in to unmask]
From: David Arivett <[log in to unmask]>
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There have been several postings about plugged / tented vias over the last
several days. It has been stated that you must tent vias to prevent
contamination being trapped in the holes. It has then been pointed out that
tents can crack and allow contaminants in the holes. Plugging with LPISM,
plugging with epoxy mask, before hot air level, after hot air level have all
been discussed with each being the way to do it or absolutely NOT the way to
do it depending on the experience of the author. As a board manufacturer we
have been involved in these discussions with customers for years (not to
mention should it be plugged from the top-side or the bottom side, or both).
Many of them feel passionatly about their position. We, of course, strive to
give them what they want, resulting in our not being able to standardize on
one process.
Since the desire for plugged vias is due to the need for vacuum at
in-circuit test, is there not a way to modify the test fixture so the vacuum
isn't required? If that is not feasable, has anyone tried to leave the
soldermask around the vias open, leaving solder on the hole walls after
hot-air level. Then at the assembly level, have a small opening in the stencil
corresponding to the vias. This would partially fill the via with solder paste
and would plug after reflow. Has anyone attempted this? If it worked it would
be able to be performed during an existing process step as opposed to the
extra steps required to plug vias with soldermask.
David Arivett
Cuplex, Inc
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