I think the only thing this discussion has agreed upon is: it depends.
Clarifying a couple of points that may change the debate a bit:
Copper flood under a BGA that is fanned out to vias doesn't seem to be the
question here, as it wouldn't add much copper at all. This would only have an
effect with via in pad.
Using a component side GND flood as the primary return plane is just bad news
with or without BGAs. You will not get good return paths. And like Bob
mentioned, those pesky "mirror" currents are now on the outside. Use a
component side plane to reduce EMI, but use another internal plane for
your "real" GND plane.
Putting traces between planes is effective, but keep a VCC/GND plane pair
together, or at least physically close. If you really need to bury traces, you
probably need multiple planes, too.
If you are using BGAs, you probably have relatively high speeds, you need
capacitive planes to keep the GND bounce controlled, so start right off with a
thin GND/VCC plane sandwich in the middle of the stackup. Then add
whatever GNDs you want on outer layers, then don't worry about return
loops. (warning: a whole other bunch of "its" to "depend")
Then it's all a question of capacitve coupling effects, not iimpedance
reduction.
I just finished a large board with mixed RF/High speed digital, 2 BGAs, 3 LGAs.
8 layers, center VCC/GND, but RF GND on as many layers as possible. But not
the top - we know we'll need a shielded box anyway. And maybe another
shield over the BGA area. We have enough trouble soldering BGAs
consistently, I'm not ready to have them try via in pad yet.
But another question - why LGAs? Why not just BGAs? Or, vice-versa.
Pete
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