Is there anyone who knows or can help me with the following:

I am trying to generate an IPC-D-356 netlist for a PCB that 
has blind vias on it. The netlist is for a bare fab test.

I am not sure how the entry/entries should look in the netlist for 
the connections that go from the TOP layer to the second layer
down on an 8 layer board. (blind via is from TOP to INS1 only)

Would I need a seperate line for each layer of the connection,
eg. one line for the TOP (01)connection information and then another
line entry for the INS1 (inner 02) layer information?

317TS_BUS58         VIA         D 240PA01X+ 18520Y+154620X 240Y 240
327TS_BUS58      I  VIA         D 240PA02X+ 18520Y+154620X 240Y 240


What would be the entry for column 2 for the TOP layer portion
what would be the entry for column 2 for the INS1 layer portion

Would I need any information in columns 18,19 and 20 for the inner 
layer portion of the net? (do I need the I?) 

Is the VIA appropriate in 21-23?

I dont have much experience with this and have never output this format.
I am using a third party software that works, but does not seem to handle 
the blind via definitions at this time. I need to manually define the 
blind via descriptions to provide a complete netlist.

thanks in advance for any help.

Missy Kitlas
PC design
Sun Microsystems Inc.