First, I think the problem you are experiencing is "etching" not 
     "etchback".  Etchback refers to process which cleans the drilled 
     holes on a PCB prior to plating.  Etching is the process which 
     defines the features (pads, circuits, planes, etc.) on the 
     surface of a PCB, on either the innerlayers or outerlayers.
     
     Yes, the idea that all features on a panel etch at the same rate 
     is false.  The etching process is influenced by many variables; 
     chemistry type, concentration, specific gravity, temperature, 
     thickness of surface copper, conveyor speed, nozzle type, spray 
     pressure, spray impingement, among others can all affect the etch 
     "uniformity".  Most etching equipment manufacturers have made 
     significant strides in recent years to reduce the impact of these 
     variables, but good etch uniformity across a panel is still 
     difficult to achieve.
     
     From a design viewpoint (and manufacturing), one important issue 
     is feature spacing.  When the etching solution makes contact with 
     the copper it begins to dissolve that copper.  Once that solution 
     is saturated with dissolved copper, it must be removed and 
     replaced by fresh solution for the etching to continue.  In areas 
     of dense circuitry, this "fluid transfer" is harder to achieve.  
     In areas with isolated traces, fluid transfer or turnover takes 
     place quickly; therefor these isolated areas etch faster than the 
     dense areas.  The manufacturer must pay close attention to the 
     areas that are densely populated, in order to eliminate shorts.  
     The isolated areas will then sometimes be "over-etched".  
     
     This is a brief answer to a complex question.  If I can be of 
     further help, let me know.
     
     Mark Dowding
     Multek, Irvine
     [log in to unmask]


______________________________ Reply Separator _________________________________
Subject: FAB: Etchback
Author:  [log in to unmask] at INTERNET_GATEWAY
Date:    7/26/96 8:10 AM


     
We are having a significant problem with quickturn cards coming in 
overetched, and we're trying to understand some things about the process of 
etching.
     One question that has come up is:  Is it possible for etching to be 
greater in one area of the card over another? If so, how is this possible, 
and what are the design considerations for this?
     Some here contend that every feature should etch down by the same 
nominal amount, say .002 inch, whether the feature is an .008 trace or a 
large ground plane, since the whole PCB is exposed to etchant at the same 
time.  Is there fault in this thinking?
     Thanks in advance.
     
Jim Ennis
Adtran Inc
[log in to unmask]
     
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