Wowwww. Great topic! Lot's of interest. I agree that 
        we've been building exposed copper sidewalls for a long time. 
        I've also seen instances where no exposed copper is allowed. The 
        comment on corrosive salts <harsh environment> makes sense. I've 
        built boards for probes that are in a hospital environment and can 
        be submerged in something corrosive <I was afraid to ask> that did 
        have electromigration. (From one edge tab to another from the exposed 
        copper sidewall) I had to do a finish plate after etch <commonly
        bussed> that protected the areas where the failure occurred.
        Also if the parts are subjected to some extremely harsh thermal
        cycling requirements exposed copper may not be advisable. (like
        IC package testing, some CIM modules, BIB's <and what ever other 
        PCB that gets tested under extreme conditions that I've forgot> The
        innerlaminar bonds can degrade over time and heat <with the presence
        of oxygen> which could eventually lead to a failure. If those bare
        copper sites are fully covered, the oxygen variable is removed and
        product life is extended. Keep in mind the products I'm mentioning
        run real hot or are at the extremes of what PCB's are normally used
        for. Having exposed copper <or even thinned out LPI> at the knee
        doesn't sound very alarming unless that part is mounted on a 
        transceiver for ship-to-shore radios on ocean going freightliners.
        Each PCB probably has a different sensitivity level to these issues
        and should be considered accordingly.
                Our average PCB <like the ones in my PC> has exposed copper
        sites. We are seeing more and more movement towards OSP's. These
        basically are bare copper. Most of our SIR testing samples are bare
        copper. Passing certain criteria on SIR panels suggests certain 
        expectations on product life expectancy. Maybe Doug Pauls can
        elaborate a little more on this than I can.
        Well...enough for my wooden nickel.

        Groovy

______________________________ Reply Separator _________________________________
Subject: Re[2]: Soldermask Tented Vias
Author:  [log in to unmask] at SMTPLINK-HADCO
Date:    6/19/96 6:20 PM


     Rodger - 
     
     I vote for your suggestion! If you look at an assembly with solder 
     mask closely, one will find that the sidewalls of many surface 
     features are bare copper. I think that the electronics industry in 
     general has quite a bit of exposed copper functioning in the field 
     with few problems. The exposed copper issues I have been working seems 
     to be a "culture" issue (military product primarily) - the standard 
     question has been "won't it corrode if the copper is exposed?. There 
     will be design and use environment specific cases where bare copper 
     will be a problem but overall there are gains to be realized. Using 
     bare copper would mean that the printed wiring board would see one 
     less thermal excursion (no HASL or Refuse operation) which can only be 
     a good thing from a reliability standpoint. Lee Parker of AT&T gave me 
     a paper on the corrosion of exposed copper in several environments 
     over a 30 year period - if I can find that paper I'll post it here on 
     TechNet. Well TechNet - anyone else in support of bare copper?
     
     
     Dave Hillman
     Rockwell Collins
     [log in to unmask]
     
     
     
______________________________ Reply Separator _________________________________
Subject: Re: Soldermask Tented Vias
Author:  [log in to unmask] at ccmgw1
Date:    6/19/96 10:05 AM
     
     
     I don't know much about your soldermask issue, but I would like to see 
     some discussion of the exposed copper issue.
     
     We have felt for a long time that any exposed copper was unacceptable 
     but with the industry switching over to OSP more and more, we have to 
     accept a limited amount of copper exposure (when SMT pads don't get 
     paste).  If you are making SMT-only boards which don't flow across a 
     wave solder then the amount of exposed copper goes up tremendously.  I 
     recently talked to people at a company which is very prominent in the 
     electronics industry and has been allowing a large amount of exposed 
     copper on their PCB assemblies (look inside your PC and see how much 
     exposed copper you can find).  They have done a significant amount of 
     temperature and life testing and have seen no problems due to exposed 
     copper.
     
     If this is true, isn't it time to stop worrying about exposed copper 
     and start making boards and assemblies cheaper?
     
     Regards,
     
     Roger Held
     Hitachi Computer Products (America), Inc.
     
     
______________________________ Reply Separator _________________________________
Subject: Soldermask Tented Vias
Author:  [log in to unmask] at Internet-HICAM-OK 
Date:    6/19/96 8:48 AM
     
     
     
Good Morning,
     
We usually require soldermask over bare copper and tented vias (less than 
.020").  This typically means that the soldermask is dry film.  If a tented 
via is not required and liquid soldermask is used, it appears that the 
soldermask is suspect to flake off near the via knee, leaving a small amount 
of exposed copper.
     
Is liquid solder mask over bare copper compliant with vias when the plating 
is eletroless nickel - immersion gold?
     
Does the plating type matter?
     
Is the suspect of exposed copper a non-issue?
     
Thank you in advance of any comments.
     
Kevin Thorson
Lockhead Martin
Eagan, Mn