Mail*Link(r) SMTP FWD>ASSY: PCB Repair - Plating
Peter inquired about a customers concern about "stray" electrical fields when
re-plating conductive patterns on printed board assemblies.
Peter, both your customer's concern and your thoughts are correct. Some
components (in particular some semiconductors) are may not tolerate 3-8 Vdc on
I/O leads without a compariable operating voltage being applied to the
component itself. Worse yet, some semiconductors will not tolerate reversed
polarity voltages at all. They some MOS components and some bipolar
components will be biased as a fully on diode or SCR and "burn up", unless
current limited, at about 1 Vdc. Most bipolar base and integrated circuit
inputs will break down with reversed voltages of about 5 Vdc. So yes your
customer is right in their concern.
Likewise you are correct in your approach to short-out by bussing with a very
low resistance all conductive patterns that will or could become electrified,
or as you mentioned to adequately insulate them with an insulative material.
(Remember the definition for conductive patterns includes conductors, vias,
components holes and printed contacts.) Make sure the shorting bus is as low
a resistance as practical to ensure the current flow voltage drops in the bus
are << than 300 mV, as ~300 mV is the turn-on voltage for germanium
semiconductors and ~600 mV is the turn-on voltage for silicon semiconductors.
And you're correct, if there are not voltage drops in the conductive patterns
and your temporary plating bus, the components will see (for all practical
purposes) no inducted voltages between conductive patterns.
Hope this helps
Ralph Hersey
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--------------------------------------
Date: 6/3/96 11:29 AM
From: [log in to unmask]
A question re: board repair. When selectively re-plating a gold edge
contact, using a procedure like IPC-R-700 4.2.3.1, a voltage is applied
between a cathode and the (anode) plating swab. This voltage varies
between 3V and 8V, depending on the plating or cleaning solution to
be used.
One of our customers has queried the possible damage such voltage might
do the the components on his board. My thoughts are that the voltage and
current will be confined to the plating area, and will not get to the
components. To ensure this, either a) the gold fingers to be selectively
plated should be temporarily "bussed" to keep them all at the same
potential or b) if a single finger, then all surrounding area should be
tape masked to prevent plating solutions and/or accidental voltage getting
to it.
Has anyone else considered this a potential problem? ((Excuse pun...))
Peter
I-I-I-I-I-I-I-I-I-I-I-I-I-I-I-I-I-I-I-I-I-I-I-I-I-I-I-I-I-I-I-I-I-I-I-I-I-I-I-I
Peter Swanson Oxfordshire, England
INTERTRONICS
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